• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.4A
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• pp.546-552
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• 2000

The decoding of Turbo-Code relies on the application of a soft input/soft output decoders which can be realized using maximum-a-posteriori(MAP) symbol estimator[l]. Radix-2 MAP decoder can not be used for high speed communications because of a large number of interleaver block size N. This paper proposed a new simple method for radix-4 MAP decoder based on radix-2 MAP decoder in order to reduce the interleave block size. A branch metrics, forward and backward recursive functions are proposed for applying to radix-4 MAP structure with symbol interleaver. Radix-4 MAP decoder shall be illustratively described and its error performance capability shall be compared to conventional radix-2 MAP decoder in AWGN channel.

• IE interfaces
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• v.15 no.2
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• pp.152-158
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• 2002

The explosive growth of the internet traffic in the last few years has imposed tremendous stress on today's routers, particularly in the core network. Recently, ATM LSRs(Label Switching Router) are potentially capable of providing the highest forwarding capacity in the backbone Internet network. VC merging is a mechanism in an ATM LSR that allows many IP routes to be mapped to the same VC label, and provides a scalable mapping method that can support thousands of destinations. VC merging requires reassembly buffers so that cells belonging to different packets intended for the same destination do not interleave with each other. In this study, we propose an architecture of the ATM LSR which supports VC merging. We propose traffic control scheme called APD(Active Packet Discard) algorithm so that predicts and controls the congestion of the Internet traffic effectively. We study the performance of this algorithm using simulation.

• Journal of IKEEE
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• v.14 no.3
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• pp.250-255
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• 2010

The interleaved power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device is proposed in this paper. The buck-boost converter used to provide the high output voltage and low output voltage for portable applications. Also we used the PWM(Pulse Width Modulation) control method for high power efficiency at high current level. DTMOS with low on-resistance is designed to decrease conduction loss. The interleaved PMIC to reduce output ripple. And step-down DC-DC converter in stand-by mode below 1mA is designed with LDO in order to achive high efficiency.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.6B
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• pp.531-537
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• 2004

EPON which is the economical technology of FTTH is being actively researched as one of next generation of subscriber configurations. EPON based on Ethernet should provide subscriber with dynamic bandwidth allocation so as to support QoS. Allocation per service in grade should be satisfied resulting from the increment of the latest multimedia application arid consumption. In this paper, New Algorithm is proposed to serve differential service on MAC protocol. The delay characteristic of packet and stability are analyzed that is shown the QoS of EPON network.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.111-113
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• 2018

본 논문에서는 3상 듀얼 액티브 브리지 (3P-DAB) 컨버터의 경부하 조건에서 전력 변환 효율을 향상시키기 위한 효과적인 스위칭 알고리즘을 제안한다. 3P-DAB 컨버터는 교차배치 (Interleave) 구조로 인한 작은 필터 크기와 낮은 전도 손실을 얻을 수 있고, 추가적인 회로없이 소프트 스위칭이 가능하며 양방향 전력 흐름에서의 무절체 제어로 인해 고전력 애플리케이션에서 널리 사용되는 토폴로지 중 하나이다. 그러나 3P-DAB의 위상천이 방법(SPS)을 이용한 제어 방식의 경우 경부하 조건에서 영전압 스위칭(ZVS)의 실패 가능성이 높기때문에 효과적이지 않다. 본 논문에서는 SPS 제어 알고리즘과 비대칭 시비율 변조법 (Asymmetrical Pulse Width Modulation; APWM)을 연쇄적으로 사용하여, 경부하에서 스위치의 ZVS 영역을 넓히고자 한다. 3-kW의 3상 DAB 컨버터의 시작품을 구현하고 실험을 통해 제안된 방법의 효율성을 검증 하였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.1A
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• pp.47-53
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• 2003

This paper describes the design of a 155 Mb/s multiplexer-demultiplexer chip. This device for a 2.5 Gb/s SDH based transmission system is to interleave the parallel data of 51 Mb/s into 155 Mb/s serial data output, and is to deinterleave a serial input bit stream of 155 Mb/s into the parallel output of 51 Mb/s The input and output of the device are TTL compatible at the low-speed end, but 100K ECL compatible at the high-speed end The device has been fabricated with a 0.7${\mu}m$ BiCMOS gate array The fabricated chip shows the typical phase margin of 180 degrees and output data skew less than 470 ps at the high-speed end. And power dissipation is evaluated under 2.0W.

• Journal of the Korean Society of Industry Convergence
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• v.23 no.6_2
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• pp.989-998
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• 2020

Recently, demands for large-capacity electronic loads are increasing in various industries such as a reliability test for the performance of a DC power supply device or a dummy-load for improving the stability of an independent microgrid to be actively built in the future. The electronic load required in these various fields requires an operation such as a continuously variable resistance load while minimizing the switching harmonic component generated in the electric load current in order to reduce the influence of interference from the load peripheral device. Electronic loads require a system that minimizes switching current ripple for load control. Therefore, in this paper, we propose a three-level module converter structure to reduce the current ripple of an electronic load, and a multilevel interleaved power converter topology to reduce the current ripple. The validity of the proposed electronic load, 3-level 6 interleaver converter, was verified by simulation and experiment. In addition, the user's convenience was provided by applying the emotional command curve interface method.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.5
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• pp.719-725
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• 1986

Reed-solomon(R-S) code is very effective to coerrect both random and burst errors over a noise communication channel. However, the required hardware is very complex if the B/M algorithm was employed. Moreover, when the error correction system consists of two R-S decoder and de-interleave, the I/O data bns lines becomes 9bits because of an erasure flag bit. Thus, it increases the complexity of hardware. This paper describes the R-S decoder which consisits of a error correction section that uses a direct decoding algorithm and erasure generation section and a erasure generation section which does not use the erasure flag bit. It can be shown that the proposed R-S dicoder is very effective in reducing the size of required hardware for error correction.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.11
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• pp.10-22
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• 1998

In this paper, as a way of improving the availability and spectral efficiency of radio relay system, a co-channel radio relay system based upon the synchronous digital hierarchy is developed and its performance measured by 64-QAM with a never-seen multi-purpose ASIC chip is illustrated. This system provides a couple of transmission capacity compared with alternative channel arrangement. By adopting a powerful complex 13-tap adaptive time domain equalizer and cross-pol interference canceller, improvement of more than 1.5 ~ 2.0 dB in signature is obtained in comparison to 9 or 11-tap adaptive time domain equalizer, and about 22.5 dB in improvement factor of cross-pol interference canceller is achieved at C/N of 24.5 dB. In addition, digital filter makes it possible to optimize the occupied bandwidth by selecting an appropriate roll-off factor externally. It is expected that co-channel radio relay system with the powerful multi-purpose ASIC chip plays a key role in creating a value-added product, reliability, and reducing the outage time.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.12A
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• pp.1279-1284
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• 2004

In this paper, we propose a novel and simple optical technique for the detection of subcarrier-multiplexed(SCM) labels using optical interleavers. Optical-baseband packet signals with suppressed subcarriers appear at the through-pass port of the optical interleaver and SCM labels with suppressed optical carrier exit from the optical SCM extraction port. Since it does not require optical circulators, this structure shows less insertion loss than the previously proposed optical label detectors. The periodic nature of the interleaver transfer function makes it possible to detect multiple SCM channels simultaneously from an incoming wavelength-multiplexed signal stream. Detection of a 155-Mb/s ASK modulated 9.79-GHz subcarrier using a 10-GHz SCM optical label detector has been performed successfully and verified through optical spectra and bi t-error-rate measurements.