1 |
H. T. Weston, M. Banu, S. C. Fang, P. W. Diodato, T. D. Stanik, P. A. Wilford, and F. M. Hsu, 'A Submicrometer NMOS MUitiPieXer-Demultiplexer Chip Set for 622.08-Mb/s SONET Applications', IEEE J. of Sotid-State Circuits, Vol. 27, No. 7, pp. 1041-1049, 1992
DOI
ScienceOn
|
2 |
K. Ueda, N. Sasaki, H. Sato, S. Kubo, and K. Mashiko, '3.0 Gb/s, 272 mW, 8:1 Multiplexer and 4.1 Gb/s, 388 mW, 1:8 Demultiplexer', IEEE Symposium on VLSI Circuits Digest of Technicat Papers, pp. 123-124, 1994
|
3 |
Z. H. Lao, U. Langmann, J. N. Albers, E. Schlag, and D. Clawin, 'A 12 Gb/s Si Bipolar 4:1-Mu1tip1exer IC for SDH Systems', IEEE J. of Sotid-State Circuits, Vol. 30, No. 2, pp. 129-132, 1995
DOI
ScienceOn
|
4 |
'TGB1000/TGB2000 BiCMOS Array', Design Manual, Texas Instruments, 1993
|
5 |
'NL4702/NL4705 16:1 Mux/1:16 Demux', Data-sheet, NTT Electronic Technology corp. 1991
|
6 |
R. B. Nubling, J. Yu, K. C. Wang, P. M. Asbeck, N. H. Sheng, M. F. Chang, R. L. Pierson, G. J. Sullivan, M. A. McDonald, A. T. Phce, and D. M. Chen, 'High Speed 8:1 Multiplexer and 1:8 Demultiplexer Implemented with AlGaAs/GaAs HBTs', IEEE GaAs IC Symposium, pp. 53-56, 1990
|
7 |
'Timing and I/O Considerations', VS8061/8062 Design Application Note 1, Vitesse, 1994
|