• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.9
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• pp.1572-1578
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• 2008

The effect of the organoclay_10A nanoparticles on the DSC and Structural and Dielectrics Properties(1Hz-1MHz) for epoxy/Organoclay_10A Nanocomposites has been studied. Dielectric properties of epoxy-Organoclay nanocomposites were investigated at 1, 3, 5, 7, 9 filler concentration by weight. Epoxy nanocomposites samples were prepared with good dispersion of layered silicate using power ultrasonic method in the particles. As structural analysis, the interlayer spacing have decreased with filled nanoparticles contents increase using power ultrasonic dispersion. The maximum increase interlayered spacing was observed to decease for above 5wt% clay loading. The other hand, as decrease with concentration filler of the layered silicate were increased dispersion degree of nanoparticles in the matrix. The interesting dielectric properties for epoxy based nanocomposites systems are attributed to the large volume fraction of interfacesin the bulk of the material and the ensuring interactions between the charged nanoparticle surface and the epoxy chains.

• Proceedings of the Materials Research Society of Korea Conference
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• 1998.08a
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• pp.106.4-106
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• 1998

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.06a
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• pp.86-89
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• 2003

Chemical Mechanical Planarization(CMP) has been accepted as the most effective processes for ultra large scale integrated (ULSI) chip manufacturing. However, as the polishing process continues, pad pores get to be glazed by polishing residues, which hinder the supply of new slurry. And pad surface is ununiformly deformed as real contact distance. These defects make material removal rate(MRR) decrease with a number of polishied wafer. Also the desired within-chip planarity, within wafer non-uniformity(WIWNU) and wafer to wafer non-uniformity(WTWNU) arc unable to be achieved. So, pad conditioning in CMP Process is essential to overcome these defects. The eletroplated or brazed diamond conditioner is used as the conventional conditioning. And. allumina long fiber, the jet power of high pressure deionized water, vacuum compression. ultrasonic conditioner aided by cavitation effect and ceramic plate conditioner are once used or under investigation. But. these methods arc not sufficient for ununiformly deformed pad surface and the limits of conditioning effect. So this paper focuses on the characteristics of diamond conditioner which reopens glazed pores and removes ununiformly deformed pad away.

• Journal of the Korean Society for Precision Engineering
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• v.18 no.11
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• pp.168-173
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• 2001

The chemical mechanical polishing (CMP) is generally consisted of pad, slurry including abrasives and so on. However, there are some problems in a general CMP: defects, a high Cost of Consumable (CoC), an environmental problem. The slurry including abrasives especially gives rise to not only increase a CoC, but also prohibition from achieving an eco-process. This paper introduces an abrasive capsulation pad to achieve an eco-process decreasing abrasives used is CMP. The binder wth a water a water swelling and a water soluble characteristic is used for an auto-conditioning, and the $CeO_2$abrasive is selected for an abrasive capsulation pad. Comparing with a conventional CMP, an abrasive capsulation pad appears good characteristics in ILD CMP and is able to achieve an eco-process decreasing wasted slurry.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.651-652
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• 2005

Chemical mechanical polishing (CMP) has emerged as the planarization technique of choice in integrated circuit manufacturing. Especially, polishing pad is considered as one of the most important consumables because of its properties. Generally, conventional polishing pad has irregular pores and asperities. If conditioning process is except from whole polishing process, smoothing of asperities and pore glazing occur on the surface of the pad, so repeatability of polishing performances cannot be expected. In this paper, CMP pad with microstructure was made using micro-molding technology and repeatability of ILD(interlayer dielectric) CMP performances and was evaluated.

• Proceedings of the Korea Crystallographic Association Conference
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• 2002.11a
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• pp.48-48
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• 2002

It is generally accepted that ultra low dielectric interlayer dielectric materials (k < 2.2) will be necessary for ULSI advanced microelectronic devices after 2003, according to the International Technology Roadmap for Semiconductors (ITRS) 2000. A continuous reduction of dielectric constant is believed to be possible only by incorporating nanopores filled with air (k = 1.0) into electrically insulating matrices such as poly(methyl silsesquioxane) (PMSSQ). The nanopo.ous low dielectric films should have excellent material properties to survive severe mechanical stress conditions imposed during the advanced semiconductor processes such as chemical mechanical planarization process and multilayer fabrication. When air is incorporated into the films for lowering k, their mechanical strength has inevitably to be sacrificed. To minimize this effect, the nanopores are controlled to exist in the film as closed cells. The micromechanical properties of the nanoporous thin films are considered more seriously than ever, particularly for ultra low dielectric applications. In this study, three approaches were made to design and develop nanoporous low dielectric films with improved micromechanical properties: 1) wall density increase of nanoporous organosilicate film by copolymerization of carbon bridged comonomers; 2) incorporation of sacrificial phases with good miscibility; 3) selective surface modification by plasma treatment. Nanoporous low-k films were prepared with copolymerized PMSSQ and star-shaped sacrificial organic molecules, both of which were synthesized to control molecular weight and functionality. The nanoporous structures of the films were observed using field emission scanning electron microscopy, cross-sectional transmission electron microscopy, atomic force microscopy, and positronium annihilation lifetime spectroscopy(PALS). Micromechanical characterization was performed using a nanoindentor to measure hardness and modulus of the films.

• Korean Journal of Materials Research
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• v.1 no.2
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• pp.105-112
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• 1991

In PLZT system, a new type of material for piezoelectric actuator was developed and its properties were investigated. This material consists of three layers : a piezoelectric ceramic layer, an interlayer which composition changes gradually, and another piezoelectric layer. This kind of materials is called functionally Gradient Materials(FGM). The composition of these layers were selected from the $(Pb,\;La)(Zr,\;TiO_3$ system through the concept of materials design. Sintered FGM at $1300^{\circ}C$, 2hr has an interlayer of about $20\mu\textrm{m}$ with no distorted damage. Dielectric and piezoelectic properties of FGM show intervalues of each side composition. The strain-voltage characteristics in FGM system was improved comparison with any single composition. Especially, the FGMs were fabricated which has high piezoelectric-low dielectric composition and low piezoelectric-high dielectric composition. The properties of both FGMs were significantly improved.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.352.2-352.2
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• 2014

In this present work, we report a Cu-Mn alloy as a materials for the self-forming barrier process. And we investigated diffusion barrier properties of self-formed layer on low-k dielectrics with or without UV curing treatment. Cu alloy films were directly deposited onto low-k dielectrics by co-sputtering, followed by annealing at various temperatures. X-ray diffraction revealed Cu (111), Cu (200) and Cu (220) peaks for both of Cu alloys. The self-formed layers were investigated by transmission electron microscopy. In order to compare barrier properties between Mn-based interlayer interlayer, thermal stability was measured with various low-k dielectrics. X-ray photoelectron spectroscopy analysis showed that chemical compositions of self-formed layer. The compositions of the Mn based self-formed barriers after annealing were determined by the C concentration in the dielectric layers.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.41.2-41.2
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• 2011

Recently, scaling down of ULSI (Ultra Large Scale Integration) circuit of CMOS (Complementary Metal Oxide Semiconductor) based electronic devices become much faster speed and smaller size than ever before. However, very narrow interconnect line width causes some drawbacks. For example, deposition of conformal and thin barrier is not easy moreover metallization process needs deposition of diffusion barrier and glue layer. Therefore, there is not enough space for copper filling process. In order to overcome these negative effects, simple process of copper metallization is required. In this research, Cu-V thin alloy film was formed by using RF magnetron sputter deposition system. Cu-V alloy film was deposited on the plane $SiO_2$/Si bi-layer substrate with smooth and uniform surface. Cu-V film thickness was about 50 nm. Cu-V layer was deposited at RT, 100, 150, 200, and $250^{\circ}C$. XRD, AFM, Hall measurement system, and XPS were used to analyze Cu-V thin film. For the barrier formation, Cu-V film was annealed at 200, 300, 400, 500, and $600^{\circ}C$ (1 hour). As a result, V-based thin interlayer between Cu-V film and $SiO_2$ dielectric layer was formed by itself with annealing. Thin interlayer was confirmed by TEM (Transmission Electron Microscope) analysis. Barrier thermal stability was tested with I-V (for measuring leakage current) and XRD analysis after 300, 400, 500, 600, and $700^{\circ}C$ (12 hour) annealing. With this research, over $500^{\circ}C$ annealed barrier has large leakage current. However V-based diffusion barrier annealed at $400^{\circ}C$ has good thermal stability. Thus, thermal stability of vanadium-based thin interlayer as diffusion barrier is good for copper interconnection.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.1
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• pp.47-52
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• 2009

We studied the electrical characteristics of low-k SiOCH interlayer dielectric(ILD) films fabricated by plasma enhanced chemical vapor deposition (PECVD). BTMSM precursor was evaporated and introduced with the flow rates from 16 sccm to 25 sccm by 1 sccm step with the constant flow rate of 60 sccm $O_2$ in process chamber. The vibrational groups of SiOCH thin films were analyzed by FT!IR absorption lines, and the dielectric constant of the low-k SiOCH thin films were obtained by measuring C-V characteristic curves. The heat treatment on SiOCH thin films reduced the FTIR absorption intensity of the Si-O-$CH_3$ bonding group and Si-$CH_3$ bonding group but increased the intensity of Si-O-Si(C) bonding group. The SiOCH ILD films could have low dielectric constant $k\;{\simeq}\;2$ and also be reduced further by decreasing the $CH_3$ group density and increasing Si-O-Si(C) group density through annealing process.