• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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• pp.346-349
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• 1988

Conductance technique is the moat accurate method and gives more detailed information about interface of the MIS structure than other methods. With the measurement of the equivalent parallel conductance and capacitance, the characterization of Si-SiN interface is developed. The interface state density of Si-SiN is obtained by $8{\times}10^{11}$ - $6{\times}10^{12}(eV^{-1}cm^{-2}$). After the positive B-T stress is performed on the sample, the interface state density gets increased. The interface state density is not effected by the D.C. stress.

• Journal of Advanced Marine Engineering and Technology
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• 제8권1호
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• pp.4-16
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• 1984

The heat-pipe is characterised by the highly effective thermal conductance. In order to change the thermal conductance, the heat-pipe is connected to a reservior having a space which is filled with non-condensable gas. In normal operation, the vapour of working fluid will tend to pump the non- condensable gas into the reservoir and the gas-vapour interface situates at some point along the condenser section. The thermal conductance is affected by non- condensable gas. It is concluded that the suitable position of interface can be used to control the temperature of condenser section. In this experiment, the evaporating part is connected to the lowest position of heat-pipe. The copper heat-pipe which is filled with Freon-113 or distilled water as working fluid utilized. As results of experimental study, thermal conductance can be increased by the operating pressure which is infulenced by non-condensable gas. A correlative equation between the thermal conductance and the mass of non- condensable gas is also obtained.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.340-340
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• 2012

최근 MOS 소자들이 게이트 산화막을 Mono-layer가 아닌 Multi-Layer을 사용하는 추세이다. Bulk와 High-k물질간의 Dangling Bond를 줄이기 위해 Passivation 층을 만드는 것을 예로 들 수 있다. 이러한 Double Layer의 쓰임이 많아지면서 계면에서의 Interface State Density의 영향도 커지게 되면서 이를 측정하는 방법에 대한 연구가 활발히 진행되고 있다. 본 연구에서는 $SiO_2$ Double Layer의 Interface State Density를 Conductance Method를 사용하여 구하는 연구를 진행하였다. Wet Oxidation과 Chemical Vapor Deposition (CVD) 공정을 이용하여 $SiO_2$ Double-layer로 증착한 후 Aluminium을 전극으로 하는 MOS-Cap 구조를 만들었다. 마지막 공정은 $450^{\circ}C$에서 30분 동안 Forming-Gas Annealing (FGA) 공정을 진행하였다. LCR meter를 이용하여 high frequency C-V를 측정한 후 North Carolina State University California Virtual Campus (NCSU CVC) 프로그램을 이용하여 Flatband Voltage를 구한 후에 Conductance Method를 측정하여 Dit를 측정하였다. 본 연구 결과 Double layer (Wet/CVD $SiO_2$)에 대해서 Conductance Method를 방법을 이용하여 Dit를 측정하는 것이 유효하다는 것을 확인 할 수 있었다. 본 실험은 앞으로 많이 쓰이고 측정될 Double layer (Wet/CVD $SiO_2$)에 대한 Interface State Density의 측정과 분석에 대한 방향을 제시하는데 도움이 될 것이라 판단된다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 추계학술대회 논문집 학회본부
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• pp.189-192
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• 1988

Nitrided oxides have been investigated recently for application as a replacement for thermally grown $SiO_2$ in MIS devices. In this paper, thin oxides were nitrided in $N_2$ Plasma ambient. With the measurement of the equivalent paralled conductance and capacitance by the using coductance technique, the characterization of Si-SiON interface is developed. The interface state density of Si-SiON is obtained by $1{\times}10^{11}{\sim}9{\times}10^{11}(eV^{-1}Cm^{-2})$. After${\pm}$B-T stress is performed on the sample, the interface state density gets increased.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 ICEIC The International Conference on Electronics Informations and Communications
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• pp.343-347
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• 2004

High oxidation temperature of SiC shows a tendency of carbide formation at the interface which results in poor MOSFET transfer characteristics. Thus we developed oxidation processes in order to get low interface charge densities. N-type 6H-SiC MOS capacitors were fabricated by different oxidation processes: dry, wet, and dry­reoxidation. Gate oxidation and Ar anneal temperature was $1150^{\circ}C.$ Ar annealing was performed after gate oxidation for 30 minutes. Dry-reoxidation condition was $950^{\circ}C,$ H2O ambient for 2 hours. Gate oxide thickness of dry, wet and dry-reoxidation samples were 38.0 nm, 38.7 nm, 38.5 nm, respectively. Mo was adopted for gate electrode. To investigate quality of these gate oxide films, high frequency C- V measurement, gate oxide leakage current, and interface trapped charge densities (Dit) were measured. The interface trapped charge densities (Dit) measured by conductance method was about $4\times10^{10}[cm^{-1}eV^{-1}]$ for dry and wet oxidation, the lowest ever reported, and $1\times10^{11}[cm^{-1}eV^{-1}]$ for dry-reoxidation

• 대한전기학회:학술대회논문집
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• 대한전기학회 1989년도 추계학술대회 논문집 학회본부
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• pp.127-130
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• 1989

This paper reports the theoretical model and the experimental results regarding to the electrical conductivity of hydrogenated amorphous silicon (a-Si:H). The total effective conductance of a-Si:H with a planar structure has been considered as the sum of the conductance of an adsorbate-induced layer, a surface-interface layer, a bulk layer, and a substrate-interface layer. In order to investigate the effects of space charge layers in a-Si:H on the conductivity, the thickness dependence of the conductivity is characterized and the conductivities measured at the upper electrodes deposited on a-Si:H are compared with those measured at the lower electrodes deposited on the glass substrate. From our analysis, the bulk conductivity and the thickness of the space charge layer in a-Si:H are characterized quantitatively.

• Progress in Superconductivity
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• 제3권1호
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• pp.70-73
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• 2001

We report the spin injection and transport properties of three terminal devices of Co/Au/$YBa_2$$Cu_3$$O_{y}$(F/N/S) tunnel junctions by injection of spin-polarized quaiparticles using a cobalt ferromagnetic injector. The observed current gain depends on the thickness of Au interlayer and is directly related to the nonequilibrium magnetization due to spin relaxation effects. The tunnel characteristic of a F/N/S tunnel junctions exhibited a zero bias conductance peak (ZBCP). The suppression of the ZBCP was observed due to the suppression of Andreev reflection at the interface, which is due to the spin scattering processes at the interface between a ferromagnetic and a d-wave superconductor.r.

• 한국항공우주학회지
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• 제45권12호
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• pp.1021-1030
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• 2017

본 논문은 유한요소 열해석 시 불일치하는 격자 접촉면의 열교환계수를 효과적으로 계산하는 방법에 대해 논의한다. 원래 유한요소해석은 두 경계면 사이의 격자가 일치해야 하는데, 복잡하고 다양한 재질의 형상들의 접촉면을 모두 일치하기 위해서는 많은 수고와 계산량이 소요된다. 본문은 이를 극복하기 위해 서로 다른 두 격자면의 접촉 열교환계수를 각 절점으로 효과적으로 분배하는 새로운 기법을 제안하였다. 제시된 기법의 지향점을 서술하고 이를 위해 격자면의 형상에 의존성이 낮은 절점 가중치 분배 기법을 서술하였다. 그리고 이를 3차원의 곡면 접촉면에도 적용하여 제시한 방법론의 범용성을 확인함으로서 열해석을 포함한 여타 유한요소 해석 기법에도 적용 가능함을 알 수 있다.

• 전기학회논문지
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• 제56권7호
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• pp.1211-1217
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• 2007

In this paper, a 10kVA PV inverter applying Incremental Conductance(IncCond) method for maximum power point tracking WIS developed and its performance tests were carried out. Modeling and simulation of PV array and system controller was performed using PSCAD/EMTDC, an electromagnetic transient analysis program. After comparison and analysis of Perturbation & Observation (P & O) and IncCond method, a PV inverter based on IncCond method was designed and manufactured. Grid interface transient characteristics including start-up, normal operation, and fault operation were tested, which verified the usefulness of the proposed system. In the near future, commercialization process will proceed through additional extensive tests of transients.

• 한국초전도학회:학술대회논문집
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• 한국초전도학회 2000년도 High Temperature Superconductivity Vol.X
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• pp.141-144
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• 2000

We report on the influence of d-wave pairing symmetry in high-T$_c$ superconductor by tunneling spectroscopy. The zerobias conductance peak(ZBCP) which is produced by tunneling through the ab-plane is observed on both of metal Au/YBa$_2$Cu$_3$O$_y$(N/S) tunnel junctions and ferromagnet Co/Au/ YBa$_2$Cu$_3$O$_y$(F/N/S) tunnel junctions. The effects of Andreev reflection on the differential conductance of each junctions are dependent on the tunnel direction. For the S/N/F junction, it appears the suppression of the ZBCP due to the suppression of Andreev reflection at the interface between a ferromagnetic material and a d-wave superconductor. By comparing these experimental results with recent theoretical works on Andreev reflection, the existence of Andreev bound state is verified in high-T$_c$ superconductor, due to the d-wave symmetry of the pair potential.