• Title/Summary/Keyword: Integration module

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The Experimental Study on the Application of the Insulated Glass PV Module in the Curtain Wall (단열 복층유리 PV의 커튼 월 적용 가능성에 관한 실험적 연구)

  • Oh, Min-Seok;Kim, Hway-Suh
    • Journal of the Korean Solar Energy Society
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    • v.26 no.3
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    • pp.63-69
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    • 2006
  • In order to positively cope with the international environmental regulations like UNFCCC (UN Framework Convention on Climate Change) and to overcome energy crisis Korea, who depends on import for more than 97% of required energy, needs to continuously proceed to development, spread and expansion of alternativeenergy and then, to cultivate the capacity to keep the balance of demand and supply of energy by itself. In this aspect, the technology of BIPV (Building Integrated Photovoltaic) is the field that the world is most interested in. However, at present, this technology is centered on increasing the efficiency of the module itself so it has lots of problems to be applied to buildings. Application of the integrated PV system in building external curtain wall can obtain much more generation of electric power than in roof-types whose area for installation is restricted, so it is excellent in terms of its possibility of application. Therefore, this paper intends to advance its practical use by proposing how to get integrated PV system which can be applied to building external curtain wall, and how to apply it.

Evaluation Items of ESM S/W by Case Analysis (사례분석을 통한 ESM S/W의 평가항목)

  • Kang, Deuk-Soo;Yang, Hae-Sool
    • The Journal of the Korea Contents Association
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    • v.10 no.8
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    • pp.84-94
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    • 2010
  • ESM can do and wishes to investigate ESM software field base technology and investigate ESM software technology, market, standard and evaluation certification trend and develop evaluation model of ESM software that it becomes foundation to protect ESM software effectively that develop quality evaluation model of ESM software in this research by integration security administration system that gather fire wall, IDS, VPN etc. various kind of security solution by one. That is, because reflecting requirement of ESM software, develop evaluation module and proposed evaluation example along with method of exam.

Design and Implementation of Seismic Data Acquisition System using MEMS Accelerometer (MEMS형 가속도 센서를 이용한 지진 데이터 취득 시스템의 설계 및 구현)

  • Choi, Hun;Bae, Hyeon-Deok
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.61 no.6
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    • pp.851-858
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    • 2012
  • In this paper, we design a seismic data acquisition system(SDAS) and implement it. This system is essential for development of a noble local earthquake disaster preventing system in population center. In the system, we choose a proper MEMS-type triaxial accelerometer as a sensor, and FPGA and ARM processor are used for implementing the system. In the SDAS, each module is realized by Verilog HDL and C Language. We carry out the ModelSim simulation to verify the performances of important modules. The simulation results show that the FPGA-based data acquisition module can guarantee an accurate time-synchronization for the measured data from each axis sensor. Moreover, the FPGA-ARM based embedded technology in system hardware design can reduce the system cost by the integration of data logger, communication sever, and facility control system. To evaluate the data acquisition performance of the SDAS, we perform experiments for real seismic signals with the exciter. Performances comparison between the acquired data of the SDAS and the reference sensor shows that the data acquisition performance of the SDAS is valid.

A Numerical Study of NAND Flash Memory on the cooling effect (낸드플래시 메모리의 냉각효과에 관한 수치적 연구)

  • Kim, Ki-Jun;Koo, Kyo-Woog;Lim, Hyo-Jae;Lee, Hyouk
    • 한국전산유체공학회:학술대회논문집
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    • 2011.05a
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    • pp.117-123
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    • 2011
  • The low electric power and high efficiency chips are required because of the appearance of smart phones. Also, high-capacity memory chips are needed. e-MMC(embedded Multi-Media Card) for this is defined by JEDEC(Joint Electron Device Engineering Council). The e-MMC memory for research and development is a memory mulit-chip module of 64GB using 16-multilayers of 4GB NAND-flash memory. And it has simplified the chip by using SIP technique. But mulit-chip module generates high heat by higher integration. According to the result of study, whenever semiconductor chip is about 10 $^{\circ}C$ higher than the design temperature it makes the life of the chip shorten more than 50%. Therefore, it is required that we solve the problem of heating value and make the efficiency of e-MMC improved. In this study, geometry of 16-multilayered structure is compared the temperature distribution of four different geometries along the numerical analysis. As a result, it is con finned that a multilayer structure of stair type is more efficient than a multilayer structure of vertical type because a multi-layer structure of stair type is about 9 $^{\circ}C$ lower than a multilayer structure of vertical type.

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Design and fabrication of the Locomotive Mechanism for Capsule Endoscopes Using Shape Memory Alloys (SMA) (SMA를 이용한 캡슐 내시경의 이동메커니즘 설계 및 제작)

  • Lee, Seung-Hak;Kim, Byung-Kyu;Park, Jong-H.;Park, Jong-Oh
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.27 no.11
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    • pp.1849-1855
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    • 2003
  • Newly commercialized wireless capsule endoscope has many advantages compared to conventional push-type endoscopes. However, it is moved by the peristaltic waves. Therefore, it can not diagnose desired zones actively. In this paper, a locomotive mechanism for wireless capsule endoscope is proposed to increase the efficiency of endoscopy. We designed and fabricated a prototype using SMA springs and bio-mimetic clamping device. The hollow space in the prototype is allocated for further system integration of a camera module, a RF module and a battery. And the sequential control scheme is employed to improve the efficiency of its locomotion. To validate the performance of the locomotive mechanism, experiments on a silicone rubber pad and in vitro tests are carried out. The results of the experiments indicate that proposed mechanism is effective in harsh environments such as digestive organs of a human.

A design of Encoder Hardware Chip For H.264 (H.264 Encoder Hardware Chip설계)

  • Kim, Jong-Chul;Suh, Ki-Bum
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.10a
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    • pp.100-103
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    • 2008
  • In this paper, we propose H.264 Encoder integrating Intra Prediction, Deblocking filter, Context-Based Adaptive Variable Length Coding, and Motion Estimation encoder module. This designed module can be operated in 440 cycle for one-macroblock. To verify the Encoder architecture, we developed the reference C from JM 9.4 and verified the our developed hardware using test vector generated by reference C. The designed circuit can be operated in 166MHz clock system, and has 1800k gate counts using Charterd 0.18um process including SRAM memory. Manufactured chip has the size of $6{\times}6mm$ and 208 pins package.

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Development of Simple Reconfigurable Access Mechanism for SoC Testing (재구성 가능한 시스템 칩 테스트 제어기술의 개발)

  • 김태식;민병우;박성주
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.8
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    • pp.9-16
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    • 2004
  • For a System-on-a-Chip(SoC) comprised of multiple IP cores, test control techniques have been developed to perform the internal and external test efficiently relying on the various design for testability techniques such as scan and BIST(Built-In Self-Test). However the test area overhead is too expensive to guarantee diverse test link configurations. In this paper, at first we introduce a new flag based Wrapped Core Linking Module(WCLM) that enables systematic integration of IEEE 1149.1 TAP'd cores and P1500 wrapped cores. Then a simple test control technique, which can interconnect internal scan chains of different cores, is described with requiring least amount of area overhead compared with other state-of-art techniques. The design preserves compatibility with standards and scalability for hierarchical access.

A design of Encoder Hardware Chip For H.264 (H.264 Encoder Hardware Chip설계)

  • Suh, Ki-Bum
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.12
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    • pp.2647-2654
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    • 2009
  • In this paper, we propose H.264 Encoder integrating Intra Prediction, Deblocking Filter, Context-Based Adaptive Variable Length Coding, and Motion Estimation encoder module. This designed module can be operated in 440 cycle for one-macroblock. To verify the Encoder architecture, we developed the reference C from JM 9.4 and verified the our developed hardware using test vector generated by reference C. The designed circuit can be operated in 166MHz clock system, and has 1800K gate counts using Charterd 0.18 um process including SRAM memory. Manufactured chip has the size of $6{\times}6mm$ and 208 pins package.

EPICS Based RF Control System for PAL Storage Ring (EPICS를 이용한 가속기 RF 제어시스템 개발)

  • Yoon, J.C.;Park, H.J.;Lee, J.Y.;Choi, J.Y.;Nam, S.Y.
    • Proceedings of the KIEE Conference
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    • 2003.07d
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    • pp.2239-2241
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    • 2003
  • A new RF control system of Pohang Accelerator Laboratory (PAL) storage ring is a subsystem upgraded PAL control system, which is based upon Experimental Physics and Industrial Control System (EPICS). There are 5 control components, Low Level RF System (LRS), Klystron System, Circulator System, Cavity System, Local Cooling Water System (LCW) at the storage ring of PAL. The new RF control system for the storage ring has been under development for one years, first versions of individual VME (Versa Module Europa) Input/output modules under construction and system integration begun. In this system, VMEbus-based hardware is widely used for front-end controllers (FDS), Input/output controller (IOC). A number of Programmable Logic Controller (PLC) and SUN workstations are also used for Operator Interfaces (OPI) in the control system. This paper describes the development VME I/O module to the new control system and how the design of this new system.

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An Experimental Study of Performance Improvement of Air Type PV/T Collector Units (실험에 의한 공기식 태양광·열 복합 유닛의 성능 비교)

  • Kim, Jin-Hee;Yang, Yeon-Won;Kim, Jun-Tae
    • KIEAE Journal
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    • v.7 no.6
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    • pp.17-22
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    • 2007
  • The integration of PV modules into building facades or roof could raise their temperature that results in the reduction of PV system's electrical power generation. Hot air can be extracted from the space between PV modules and building envelope, and used for heating in buildings. The extraction of hot air from the space will enhance the performance of BIPV systems. The solar collector utilizing these two aspects is called PV/T(photovoltaic/thermal) solar collector. This paper compares the experimental performance of two different types of air type PV/T collector units: the base case of a collector unit with 10cm gap for forced ventilation and the other unit with copper pin attached to PV module to enhance its thermal performance. The experimental results shows that the base case unit had the overall efficiency of 41.9% and the improved unit with copper pin attached to PV module had 50.1% efficiency. For these air type PV/T units, the forced ventilation of the air space improved the electrical performance as well as the thermal performance.