• Title/Summary/Keyword: Integrated substrate

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High-Performance Metal-Substrate Power Module for Electrical Applications

  • Kim, Jongdae;Oh, Jimin;Yang, Yilsuk
    • ETRI Journal
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    • v.38 no.4
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    • pp.645-653
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    • 2016
  • This paper demonstrates the performance of a metal-substrate power module with multiple fabricated chips for a high current electrical application, and evaluates the proposed module using a 1.5-kW sinusoidal brushless direct current (BLDC) motor. Specifically, the power module has a hybrid structure employing a single-layer heat-sink extensible metal board (Al board). A fabricated motor driver IC and trench gate DMOSFET (TDMOSFET) are implemented on the Al board, and the proper heat-sink size was designed under the operating conditions. The fabricated motor driver IC mainly operates as a speed controller under various load conditions, and as a multi-phase gate driver using an N-ch silicon MOSFET high-side drive scheme. A fabricated power TDMOSFET is also included in the fabricated power module for three-phase inverter operation. Using this proposed module, a BLDC motor is operated and evaluated under various pulse load tests, and our module is compared with a commercial MOSFET module in terms of the system efficiency and input current.

N-Type Carbon-Nanotube MOSFET Device Profile Optimization for Very Large Scale Integration

  • Sun, Yanan;Kursun, Volkan
    • Transactions on Electrical and Electronic Materials
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    • v.12 no.2
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    • pp.43-50
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    • 2011
  • Carbon-nanotube metal oxide semiconductor field effect transistor (CN-MOSFET) is a promising future device candidate. The electrical characteristics of 16 nm N-type CN-MOSFETs are explored in this paper. The optimum N-type CN-MOSFET device profiles with different number of tubes are identified for achieving the highest on-state to off-state current ratio ($I_{on}/I_{off}$). The influence of substrate voltage on device performance is also investigated in this paper. Tradeoffs between subthreshold leakage current and overall switch quality are evaluated with different substrate bias voltages. Technology development guidelines for achieving high-speed, low-leakage, area efficient, and manufacturable carbon nanotube integrated circuits are provided.

A Miniaturized Broadband Impedance Transformer Employing Periodic Ground Structure for Application to Silicon RFIC (주기적 접지구조를 이용한 실리콘 RFIC용 광대역 소형 임피던스 변환기)

  • Young, Yun
    • Journal of Advanced Marine Engineering and Technology
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    • v.35 no.4
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    • pp.483-490
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    • 2011
  • Using a coplanar waveguide employing periodic ground structure (PGS) on silicon substrate, a highly miniaturized and broadband impedance transformer was developed for application to low impedance matching in broadband. Concretely, the multi-section transformer was designed using Chebyshev polynomials design technique for ultra broadband operation. Its size was 0.026 $m^2$ on silicon substrate, which was 8.7 % of the one fabricated by conventional coplanar waveguide on silicon substrate. The transformer showed a good RF performance over a ultra broadband from 8 - 49.5 GHz.

Graphene Field-effect Transistors on Flexible Substrates

  • So, Hye-Mi;Kwon, Jin-Hyeong;Chang, Won-Seok
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.578-578
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    • 2012
  • Graphene, a flat one-atom-thick two-dimensional layer of carbon atoms, is considered to be a promising candidate for nanoelectronics due to its exceptional electronic properties. Most of all, future nanoelectronics such as flexible displays and artificial electronic skins require low cost manufacturing process on flexible substrate to be integrated with high resolutions on large area. The solution based printing process can be applicable on plastic substrate at low temperature and also adequate for fabrication of electronics on large-area. The combination of printed electronics and graphene has allowed for the development of a variety of flexible electronic devices. As the first step of the study, we prepared the gate electrodes by printing onto the gate dielectric layer on PET substrate. We showed the performance of graphene field-effect transistor with electrohydrodynamic (EHD) inkjet-printed Ag gate electrodes.

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Optical Properties of HVPE Grown GaN Substrates (HVPE법으로 성장된 GaN 기판의 광학적 특성)

  • 김선태;문동찬
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.11 no.10
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    • pp.784-789
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    • 1998
  • In this work, the optical properties of freestanding GaN single crystalline substrate grown by hydride vapor phase epitaxy(HVPE) were investigated. The low temperature PL spectrum in freestanding GaN consists of free and bound exciton emissions, and a deep DAP recombination around at 1.8eV. The optically-pumped stimulated emission in freestanding GaN substrate was observed at room temperature. At the maximum power density of 2MW/$\textrm{cm}^2$, the peak energy and FEHM of stimulated emission were 3.318 eV and 8meV, respectively. The excitation power dependence on the integrated emission intensity indicates the threshold pumping power density of 0.4 MW/$\textrm{cm}^2$.

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A Study on the Integration of Zigzag Dipole Antennas and Improvement of Its Resonance Characteristics (지그재그 다이폴 안테나의 집적화와 공진 특성 개선에 관한 연구)

  • Jeon Hoo-Dong;Lee Young-Soon;Park Eui-Joon
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.4 s.346
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    • pp.44-51
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    • 2006
  • In this paper, the resonance characteristics of zigzag wire dipole antennas are first analyzed by the method of moment(MOM) for shortening the space occupation length of straight wire dipole antenna Considering the shortening effect the integrated zigzag dipole antennas with the simplified microstrip feed are designed. Since the integration gives rise to discontinuities due to antenna line width with abrupt bend angles, the compensation by the chamfer is applied. Futhermore the integrated parasitic zigzag lines are properly attached to both sides of substrate for compensation of the effect of the dielectric substrate, hence improving the resonance characteristic. The design results at UHF and ISM band are verified with experiments.

High-Quality Bondwire Integrated Transformer (고품질 본드와이어 집적형 트랜스포머)

  • Song, Byeong-Uk;Lee, Hae-Yeong
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.39 no.2
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    • pp.81-91
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    • 2002
  • In this paper, a high-quality integrated transformer using bondwires is proposed and fabricated. The bondwire transformer inherently has low conductor loss due to wide cross-section and small parasitic capacitance because the vertical placement of the bondwire loop separates from substrate and effectively reduces the substrate effects. It can be fabricated easily by used of the modern automatic wirebonding technology. The electrical characteristics of the fabricated transformers are compared with those of the spiral transformer It is expected that the bondwire transformer can improve the performance for RFIC and MMIC applied to a variety of application, for example, Mixer, Balanced Amplifier, VCO, and LNA.

Commercialization of Microencapsulated Electrophoretic Displays

  • McCreary, Michael
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.524-524
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    • 2006
  • For decades, the pursuit of volume commercialization of low-power reflective displays with a paper-like look has been an unfulfilled dream. While steady technical progress was made throughout the late 1990s, there were still no volume products incorporating electronic paper displays (EPD) on the market. Now, microencapsulated electrophoretic display technology, also called electronic ink, has moved into volume production with a frontplane laminate (FPL) display component called E Ink Imaging Film™. This film is coated roll to roll on a flexible plastic substrate and integrated into a display module. Today, all-plastic segmented displays are being shipped as well as displays with electronic ink FPL being driven by glass TFT backplanes. A roadmap to active matrix flexible electrophoretic displays is being enabled by rapid technical progress on flexible TFT backplanes by a variety companies. Each of the approaches to these backplanes and flexible active matrix displays has different advantages for the various market segments being pursued including large format flexible displays for e-news and other reader applications, rollable displays for compact readers, and high resolution small format displays up to 400 ppi that can have fully integrated drive electronics to reduce size and drive down costs. Backplane approaches include Si on plastic, organic transistors on plastic, and Si transistors on flexible stainless steel substrate. Progress is also being made on next generation inks, including more reflective inks with higher contrast ratios. A full color 6 inch, 170 pixel per inch (PPI) active matrix display using a newer generation ink has been developed and this will be described and demonstrated. Large format segmented flexible displays will also be described.

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Control of Nanospacing in TiO2 Nanowire Array Using Electron Beam Lithography

  • Yun, Young-Shik;Yeo, Jong-Souk
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.430.1-430.1
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    • 2014
  • According to advanced nanotechnology in the field of biomedical engineering, many studies of the interaction between topography of surfaces and cellular responses have been focused on nanostructure. In order to investigate this interaction, it is essential to make well-controlled nanostructures. Electron beam lithography (EBL) have been considered the most typical processes to fabricate and control nano-scale patterns. In this work, $TiO_2$ nanowire array was fabricated with hybrid process (top-down and bottom-up processes). Nanodot arrays were patterned on the substrate by EBL process (top-down). In order to control the spacing between nanodots, we optimized the EBL process using Poly(methyl methacrylate) (PMMA) as an electron beam resist. Metal lift-off was used to transfer the spacing-controlled nanodots as a seed pattern of $TiO_2$ nanowire array. Au or Sn nanodots which play an important role for catalyst using Vapor-Liquid-Solid (VLS) method were patterned on the substrate through the lift-off process. Then, the sample was placed in the tube furnace and heated at the synthesis temperature. After heat treatment, $TiO_2$ nanowire array was fabricated from the nanodots through VLS method (bottom-up). These results of spacing-controlled nanowire arrays will be used to study the interaction between nanostructures and cellular responses in our next steps.

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