• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2001년도 ICCAS
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• pp.153.3-153
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• 2001

Recently, the researches on the mobile computing technologies for palm computers, PDA´s and wearable computers became very active. In the development of mobile devices, one of the key technologies is the human interface. So, this paper suggests a new input device for PDA´s and wearable computers so-called key-glove. The design methods of key-glove are discussed in this paper and we manufactured the key-glove which recognizes that character is typed in though the hand´s movements analysis and is designed as an input device for wearable computers and virtual environment. Also, we are executes a performance test for alphanumeric data entry, command entry and X-Y pointer input. In the results, we are confirmed in its ...

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 추계학술대회 논문집 학회본부
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• pp.242-245
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• 1995

In this paper the multiple three rectifiers for the power factor correction are proposed, analyzed and designed. The multiple three phase rectifiers draw sinusoidal ac currents from the ac voltage sources with nearly unity input power factor and operate with PWM making the control circuit simple and system cost low. Outstandingly it reduces the rated power capacity of devices and the input filter size by reducing input current ripples. Moreover design rules can be obtained from input and output current equations. With the proposed rules, input power factor and output power capacity are determined approximately. Finally these design rules are verified with computer simulations.

• 조명전기설비학회논문지
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• 제22권3호
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• pp.15-26
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• 2008

This paper proposes a new sinusoidal rectifier which improves input factor and input current waveform without complicated switching modulation such as pulse width or a complicated feed back control. The proposed rectifier consists of a pair of capacitors connected in series, a full bridge diode rectifier, a pair of inductors, and a pair of switching devices connected in series. While the configuration of the sinusoidal rectifier is simple in itself, it effectively reduces the reactive power and harmonics involved(IEC555-2 SC77A90 Class C) in input line current. The excellent properties of the new sinusoidal rectifier are verified by theoretical analysis and experimental results.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2008년도 추계학술대회 논문집
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• pp.327-331
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• 2008

The problems of power factor and harmonics are occurred in converter system which used to SCRs and diodes as power semiconductor devices IGBT was solved that problem, maintain the input line current with sinusoidal wave current of input power source voltage. In this paper, three phase AC to DC boost converter that operates with unity power factor and sinusoidal input currents is presented. The current control of the converter is based on the space vector PWM strategy with fixed switching frequency and the input current tracks the reference current within one sampling time interval. Space vector PWM strategy for current control was materialized as a digital control method. By using this control strategy low ripples in the output voltage, low harmonics in the input current and fast dynamic responses are achieved with a small capacitance in the dc link.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 A
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• pp.185-187
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• 1995

A boost converter proposed in this paper operates with high power factor due to input current of sinusoidal waveform. If there were no input LPF, the current is got to be discontinuos form in proportion to AC input voltage magnitude under the constant duty factor switching. Thereupon, the harmonics of input current waveform is reduced and the LPF is made with few elaboration and the control circuit is simple. The switching devices in proposed circuit are operated with soft switching by the partial resonant method. The patial resonant circuit makes use of a reactor using step-up and a capacitor of loss-less snubber. The result is that switching loss is very low and efficiency of system is high.

• 전자공학회논문지A
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• 제28A권1호
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• pp.40-45
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• 1991

It is well known that the conventional differential source-coupled pair uses gates as its input terminals. This input pair provids a high open-loop gain, a large CMRR, and a good PSRR. For these reasons, the input pair has been used widely as an input stages of the differential amplifiers, but a narrow linear input range of this structurelimits its application in the area of some analog circuit design. A novel CMOS source-coupled backgate pair is proposed in this paper. The bulk of MOSFET is exploited and input devices are biased to operate in ohmic region. With this topology, the backgate pair of the wide linear input range and variable transconductance can be obtained. This backgate input differential stage is realized with the size of W/L=50/25 MOSFETs. The results show the nonlinear error is less than $\gamma$1% over 10V full-scale range for the bias current of 200$\mu$A with 10V single power-supply.

• 한국광학회지
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• 제17권1호
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• pp.68-74
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• 2006

DFB 반사기가 집적된 다중전극 레이저 다이오드에 Return-to-zero (RZ) pseudorandom bit sequence (PRBS) 데이터와 nonreturn-to-zero (NRZ) PRBS 데이터를 주입하여 이 신호로부터 광 클럭 신호를 추출하였다. 11.727 Gbit/s RZ PRBS 데이터와 NRZ PRBS 데이터로부터 재생된 광 클럭의 root-mean-square (rms) 타이밍 지터 (timing jitter)는 약 1 ps 정도로써 아주 우수한 결과를 얻어냈다. NRZ PRBS 데이터로부터 pseudo return-to-zero (PRZ) 데이터로 포맷변환을 구현하고, 클럭 성분을 갖고 있는 PRZ 신호를 이용하여 광 클럭을 추출하였다. 입력 PRZ데이터 신호의 rms 타이밍 지터는 2ps 이상일지라도 이로부터 추출해 낸 광 클럭의 rms 타이밍 지터는 1ps 정도의 좋은 특성을 얻어냈다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.623-624
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• 2006

In this paper, we introduce the design and fabrication of V-band power amplifier MMIC with excellent gain-flatness for IEEE 802.15.3c WPAN system. The V-band power amplifier was designed using ETRI' $0.12{\mu}m$ PHEMT process. The PHEMT shows a peak transconductance ($G_{m,peak}$) of 500 mS/mm, a threshold voltage of -1.2 V, and a drain saturation current of 49 mA for 2 fingers and $100{\mu}m$ total gate width (2f100) at $V_{ds}$=2 V. The RF characteristics of the PHEMT show a cutoff frequency, $f_T$, of 97 GHz, and a maximum oscillation frequency, $f_{max}$, of 166 GHz. The gains of the each stages of the amplifier were modified to have broadband characteristics of input/output matching for first and fourth stages and get more gains of edge regions of operating frequency range for second and third stages in order to make the gain-flatness of the amplifier excellently for wide band. The performances of the fabricated 60 GHz power amplifier MMIC are operating frequency of $56.25{\sim}62.25\;GHz$, bandwidth of 6 GHz, small signal gain ($S_{21}$) of $16.5{\sim}17.2\;dB$, gain flatness of 0.7 dB, an input reflection coefficient ($S_{11}$) of $-16{\sim}-9\;dB$, output reflection coefficient ($S_{22}$) of $-16{\sim}-4\;dB$ and output power ($P_{out}$) of 13 dBm. The chip size of the amplifier MMIC was $3.7{\times}1.4mm^2$.

• 한국지진공학회논문집
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• 제10권3호
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• pp.1-11
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• 2006

이 논문에서는 에너지 소산장치가 장착된 사장교의 지진 취약도 해석 방법을 제시하고 에너지 소산장치의 장착 및 주탑-보강형 연결 조건에 따른 지진 취약도 변화를 살펴본다. 입력지반운동, 에너지 소산장치 특성값 및 사장교 강성 모형에 확률 변수를 도입하여 불확실성을 고려하고 에너지 소산장치의 비선형 이력거동을고려하여 시간이력 해석을 수행한다. 해석결과의 회귀분석을 통한 최대 응답과 입력지반운동 세기(intensity) 사이의 관계식으로부터 취약도 해석을 위한 소요 역량(demand)을 수립한다. 역량(capacity)에 해당하는 한계상태는 주탑 하부의 전단력, 보강형의 교축방향 변위, 케이블 장력의 변동량 그리고 강주탑의 좌굴이 고려된다. 해석 예제로서 강주탑 사장교인 제 2 진도대교 모형에 대하여 취약도 해석을 수행하였다. 취약도 해석결과 에너지 소산장치의 사용을 통하여 구속 또는 비구속 연결조건시 높은 손상확률을 보이던 한계상태에 대하여 그 손상확률을 크게 줄일 수 있음을 확인하였다.

• 인터넷정보학회지
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• 제12권3호
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• pp.33-37
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• 2011