• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.58 no.7
• /
• pp.1349-1355
• /
• 2009

This paper is studied on a novel power factor correction (PFC) AC-DC converter of high efficiency by soft switching technique. The input current waveform in the proposed converter is got to be a sinusoidal form composed of many a discontinuous pulse in proportion to the magnitude of a ac input voltage under the constant switching frequency. Therefore, the input power factor is nearly unity and the control method is simple. The proposed converter adding an electric isolation operates with a discontinuous current mode (DCM) of the reactor in order to obtain some merits of simpler control, such as fixed switching frequency, without synchronization control circuit used in continuous current mode (CCM). To achieve the soft switching (ZCS or ZVS) of control devices, the converter is constructed with a new loss-less snubber for a partial resonant circuit. It is that the switching losses are very low and the efficiency of the converter is high, Particularly, the stored energy in a loss-less snubber capacitor recovers into input side and increases input current from a resonant operation. The result is that the input power factor of the proposed converter is higher than that of a conventional PFC converter. This paper deals mainly with the circuit operations, theoretical, simulated and experimental results of the proposed PFC AC-DC converter in comparison with a conventional PFC AC-DC converter.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.21 no.3
• /
• pp.213-216
• /
• 2008

The voltages for pixel electrodes on LCD panels are supplied with analog voltages from LCD Driver ICs (LDIs). The latest LDI developed for large LCD TV's has suffered from the degradation of analog output characteristics (target voltage: AVO and output voltage deviation: dVO). By the failure analysis, humps in $I_D-V_G$ curves have been observed in high voltage (HV) NMOS devices for input transistors in amplifiers. The hump is investigated to be the main cause of the deviation for the driving current in HV NMOS transistors. It also makes the matching between two input transistors worse and consequently aggravates the analog output characteristics. By simply modifying the active layout of HV NMOS transistors, this hump was removed and the analog characteristics (AVO &dVO) were improved significantly. In the help of the improved analog characteristics, it also became possible to reduce the size of the input transistors less than a half of conventional transistors and significantly improve the integration density of LDIs.

• Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
• /
• v.16 no.2
• /
• pp.291-297
• /
• 1998

In order to accomplish the digital map production I/O devices should be used which are used for data input procedure to convert original paper map(hardcopy) data into computer compatible digital map data, and for the mapsheet output procedure of worked out data. For the input device, digitizer and scanner are most frequently used. Digitizer has possibility of direct production of digital data, and are mainly used for input procedure of partly plotted source map. In contrary, scanner is rather easy to operate the instrument, so that is widely used for the input procedure of original sheet map. In this study, to extract the input device characteristics, some kinds of digitizers and scanners were cheesed and used for the positional error analysis through the operational method and types of instruments. Also for the output device characteristics, some kinds of plotter and materials are used and compared to analyze the positional error through the instrumental types and output sheet materials.

• Journal of the Korean Institute of Intelligent Systems
• /
• v.14 no.3
• /
• pp.298-303
• /
• 2004

This paper deals with a stochastic stabilization of observer-based output-feedback control Takagi-Sugeno (T-S) fuzzy system with Markovian input delay. The finite Markovian process is adopted to model the input delay of the overall control system. It is assumed that the zero and hold devices are used for control input. The continuous-time T-S fuzzy system with the Markovian input delay is discretized for easy handling delay, accordingly, the discretized T-S fuzzy system is represented by a discrete-time T-S fuzzy system with jumping parameters. The stochastic stabilizability of the jump T-S fuzzy system is derived and formulated in terms of linear matrix inequalities (LMIs). The usefulness of the proposed algorithm is also certificated by simulation of 2 degree of freedom helicopter model.

• Journal of Power Electronics
• /
• v.17 no.3
• /
• pp.590-600
• /
• 2017

This paper presents a ripple-free input current modified interleaved boost converter for high step-up applications. By integrating dual coupled inductors and voltage multiplier techniques, the proposed converter can reach a high step-up gain without an extremely high turn-ON period. In addition, a very small auxiliary inductor employed in series to the input dc source makes the input current ripple theoretically decreased to zero, which simplifies the design of the electromagnetic interference (EMI) filter. In addition, the voltage stresses on the semiconductor devices of the proposed converter are efficiently reduced, which makes high performance MOSFETs with low voltage rated and low resistance $r_{DS}$(ON) available to reduce the cost and conduction loss. The operating principles and steady-state analyses of the proposed converter are introduced in detail. Finally, a prototype circuit rated at 400W with a 42-50V input voltage and a 400V output voltage is built and tested to verify the effectiveness of theoretical analysis. Experimental results show that an efficiency of 95.3% can be achieved.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.26 no.3
• /
• pp.205-213
• /
• 2021

Due to the advantage of reducing the voltage applied to the switch semiconductor, the input series and output parallel combination is widely used in systems with high input voltage and large output current. On the other hand, the LLC converter is widely used as a high-efficiency power converter, and when connected by ISOP combination, there is a possibility that input voltage imbalance may occur due to a mismatch of passive devices. To avoid damaging the switching device, this study analyzed the DC-link voltage imbalance of a high-capacity supply using an ISOP LLC converter. In addition, the case where DC-link unbalance control was applied and the case not applied was analyzed respectively. Based on this analysis, an initial start-up algorithm was proposed to prevent input power semiconductor device damage due to DC-link over-voltage. The effectiveness of the proposed algorithm has been verified through simulations and experiments.

• Journal of the Microelectronics and Packaging Society
• /
• v.15 no.3
• /
• pp.19-25
• /
• 2008

In this paper, author proposes a novel step-up AC-DC chopper operated with power factor correction(PFC) and with high efficiency. The proposed chopper behaves with discontinuous current control(DCC) of input current. The input current waveform in the proposed chopper is got to be a discontinuous sinusoid form in proportion to magnitude of ac input voltage under the constant duty cycle switching. Therefore, the input power factor is nearly unity and the control method is simple. In the general DCC chopper, the switching devices are turned-on with the zero current switching, but turn-off of the switching devices is switched at current maximum value. To achieve a soft switching of the switching rum-off, the proposed chopper is used a new partial resonant circuit. The result is that the switching loss is very low and the efficiency of chopper is high.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.11 no.2
• /
• pp.142-148
• /
• 2006

In this paper, authors propose a novel step-up AC-DC converter operated with power factor correction (PFC) and with high efficiency. The proposed converter behaves with discontinuous current control (DCC) of input current. The input current waveform in the proposed converter is got to be a discontinuous sinusoid form in proportion to magnitude of at input voltage under the constant duty cycle switching. Therefore, the input power factor is nearly unity and the control method is simple. In the general DCC converters, the switching devices are turned-on with the zero current switching (ZCS). But turn-off of the switching devices is done at the maximum current. To achieve a soft switching at turn-off, the proposed converter uses a new partial resonant circuit, which results in the very low switching loss and the high efficiency of converter.

• The Transactions of the Korean Institute of Electrical Engineers D
• /
• v.53 no.11
• /
• pp.768-775
• /
• 2004

The SSA technique in the digital circuit test is required to be repeated the input pattern stream to n bits output nodes n times in case of using a multiplexor. Because the method adopting a parallel/serial bit convertor to remove this inefficiency has disadvantage of requiring the test time n times for a pattern, the test strategy is required, which can enhance the test productivity by reducing the test time based on simplified fault detection mechanism. Accordingly, this paper proposes a test strategy which enhances the test productivity and efficiency by appling PAS (Parallel Signature Analysis) technique to those after analyzing the structure and characteristics of the digital devices including TTL and CMOS family ICs as well as ROM and RAM. The PSA technique identifies the faults by comparing the reminder from good device with reminder from the tested device. At this time, the reminder is obtained by enforcing the data stream obtained from output pins of the tested device on the LFSR(Linear Feedback Shift Resister) representing the characteristic equation. Also, the method to obtain the optimal signature analyzer is explained by furnishing the short bit input streams to the long bit input streams to the LFSR having 8, 12, 16, 20bit input/output pins and by analyzing the occurring probability of error which is impossible to detect. Finally, the effectiveness of the proposed test strategy is verified by simulating the stuck at 1 errors or stuck at 0 errors for several devices on typical 8051 digital board.

• Journal of the Korean Institute of Telematics and Electronics D
• /
• v.36D no.7
• /
• pp.66-79
• /
• 1999

We investigate the effects of high input power on the performance of optical bistable symmetric self-electooptic effect devices (S-SEEDs) using extremely shallow quantum wells (ESQWs). In this study, we consider the four ESQWs SEEDs; anti-reflection (AR)-coated ESQWs S-SEED, back-to-back AR coated ESQWs S-SEED, asymmetric F뮤교-Perot (AFP) ESQWs S-SEED, and back-to-back AFP-ESQWs S-SEED. As the input power increases, device performances such as on/off contrast ratio, on/off reflectivity difference are seriously degraded because of ohmic heating and exciton saturation. On the other hand, switching speed of the device increases up to certain value and then begins to decrease. With reasonable optimization of the input power for the best switching speed operation of the devices in a cascading optical interconnection system, we simulate and analyze the system bit-rate of the various ESQWs S-SEEDs, for a mesa of $5{\times}5{\mu}m^2$ size, changing the namber of quantum wells for the external bias of 0 V and -5V.