• 전력전자학회논문지
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• 제19권3호
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• pp.220-226
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• 2014

Input current ripple and harmonic components of the power device are main causes of electromagnetic interference (EMI). Although the discontinuous conduction mode (DCM) operation can reduce harmonic components of the power device by reducing reverse recovery current of diode and turn-off voltage spikes of the switch, input current ripple increases due to high peak to peak inductor current. Therefore, in this paper, frequency control algorithm is proposed to reduce the input current ripple of DCM operated interleaved boost converter. In the proposed algorithm, duty ratio is fixed either 0.33 or 0.67 to minimize the input current ripple and the switching frequency is controlled according to operating conditions. 600 W 3-phase interleaved boost converter prototype system is built to verify proposed algorithm.

• Journal of Electrical Engineering and Technology
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• 제10권6호
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• pp.2307-2314
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• 2015

In this paper, a discontinuous conduction mode (DCM) frequency control algorithm is proposed to reduce the input current ripple of a multi-phase interleaved boost converter. Unlike conventional variable duty and constant frequency control, the proposed algorithm controls the switching frequency to regulate the output voltage. By fixing the duty ratio at 1/N in the N-phase interleaved boost converter, the input current ripple can be minimized by ripple cancellation. Furthermore, the negative effects of the diode reverse recovery current are eliminated because of the DCM characteristic. A frequency controller is designed to employ the proposed algorithm considering the magnetic permeability change. The proposed algorithm is analyzed in the frequency domain and verified by a 600 W three-phase boost converter prototype that achieved 57% ripple current reduction.

• 전기학회논문지
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• 제58권10호
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• pp.1930-1935
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• 2009

This paper deals with the torque ripple reduction of permanent magnet synchronous motor using harmonic current injection. Torque ripple of electric motor reduces system stability and performances, therefore efforts to reduce torque ripple are exerted in the design process. Torque ripple can be reduced by appropriate pole/slot combination, skew of rotor or stator, design of magnetic circuit, etc. In addition, torque ripple can be also reduced by input voltage and current, and many researches have been conducted to reduce torque ripple for six-step drive. Torque ripple reduction for current vector controlled permanent magnet synchronous motor also have been conducted and verified by investigating back emf wave form. Torque ripple reduction in this paper started from getting torque profile according to input current and electrical angle calculated by FEA, then instantaneous currents at each electrical angles for constant torque are calculated and applied to experiments. Therefore, 0% of torque ripple can be obtained theoretically with harmonic current injection. In order to maximize the effect of torque ripple reduction, a BLDC motor having high harmonic component of back emf is chosen. With sinusoidal current drive, over 100% of torque ripple is obtained initially, then 0.5 % of torque ripple is obtained by FEA using harmonic current injection. The effect is verified by experiment and the presented method can be effectively applicable to Electric Power Steering(EPS).

• 전기학회논문지
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• 제61권10호
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• pp.1432-1441
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• 2012

In this study, an improved LCCT(Inductor-Capacitor-Capacitor-Trans) Z-source inverter(Improved LCCT ZSI) with characteristics of Quasi Z-source inverter(QZSI) and LCCT Z-source inverter(LCCT ZSI) is proposed. The proposed inverter can also reduce the voltage stress and input current/capacitor voltage ripples compared with conventional LCCT ZSI and Quasi ZSI. A two winding trans in Z-impedance network of the conventional LCCT ZSI is replaced by a three winding trans in the proposed inverter. To verify the validity of the proposed inverter, a DSP controlled hardware was made and PSIM simulation was executed for each method. Comparing the current and voltage ripples of each method under the condition of input DC voltage 70[V] and output AC voltage 76[Vrms], the input current and capacitor voltage ripple factors of the proposed inverter were low as 11[%] and 1.4[%] respectively. And, for generation of the same output AC voltage of each method, voltage stress of the proposed inverter was low as 175[V] under the condition of duty ratio D=0.15. As mentioned above, we could know that the proposed inverter have the characteristics of low voltage stress, low ripple factor and low operation duty ratio compared with the conventional methods. Finally, the efficiency according to load change/duty ratio and the transient state characteristics were discussed.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2005년도 춘계학술대회 논문집
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• pp.1455-1458
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• 2005

This paper presents the method of reducing torque ripple of Blushless Direct Current(BLDC) motor. In the BLDC motor, the torque is decided by the back-EMF and current waveform. If the back-EMF is constant, the torque ripple depends on the current ripple during commutation period. The current in commutation period is acquired by circuit analysis and then the torque ripple simply can be reduced by varying input voltage to flow the current continuously. And suggested method is confirmed by dynamic with parameters of 500W BLDC motor.

• 전력전자학회논문지
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• 제21권5호
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• pp.427-433
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• 2016

This paper proposes a new method for the current ripple reduction of a three-phase interleaved bidirectional DC-DC converter. Usually, the three-phase interleaved bidirectional DC-DC converter is used for battery charging and discharging to reduce battery current ripple. In V2G application, a PWM AC-DC converter is used to connect the AC power grid and three-phase interleaved bidirectional DC-DC converter for battery charging and discharging. The magnitude of DC link voltage affects the battery current ripple magnitude. Therefore, the magnitude of the battery ripple current is analyzed with variations of battery and DC link voltages. The ripple current magnitude is found to be minimized by controlling the DC link voltage. Simulation and experimental results show the usefulness of the proposed method.

• 전기학회논문지
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• 제60권3호
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• pp.538-543
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• 2011

In this paper, design and control of an interleaved boost converter for multi-string PV Inverter are discussed. Interleaved Boost converter can reduce current ripples at input and output side by cancelling an each phase of inductor currents. Therefore, it contributes to increase efficiency and downsize the whole system volume, cost. One of the advantages of the multi-string system is easy to expand power capacity by connecting the converter modules in parallel. In order to reduce current ripples, the inductor currents on each phase are controlled independently in the converter module, and communication between the converter modules is required for further ripple current reduction. Current control algorithm for the balance of the each phase ripple currents and synchronization of the converter modules based on communication are proposed and implemented in the DSP programming. 10kW prototype of the multi-string converter module is assembled and experimental results are presented to verify the proposed ripple current reduction methods.

• Journal of Power Electronics
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• 제12권2호
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• pp.249-257
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• 2012

An interleaved PWM converter is proposed to implement the features of zero voltage switching (ZVS), load current sharing and ripple current reduction. The proposed converter includes two ZVS converters with a common clamp capacitor. With the shared capacitor, the charge balance of the two interleaved parts is automatically regulated under input voltage and load variations. The active-clamping circuit is used to realize the ZVS turn-on so that the switching losses on the power switches are reduced. The ZVS turn-on of all of the switching devices is achieved during the transition interval. The interleaved pulse-width modulation (PWM) operation will reduce the ripple current and the size of the input and output capacitors. The current double rectifier (CDR) is adopted in the secondary side to reduce output ripple current so that the sizes of the output chokes and capacitor are reduced. The circuit configuration, operation principles and design considerations are presented. Finally experimental results based on a 408W (24V/17A) prototype are provided to verify the effectiveness of the proposed converter.

• Journal of Power Electronics
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• 제15권3호
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• pp.587-601
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• 2015

A high step-up dc-dc converter is proposed for photovoltaic power systems in this paper. The proposed converter consists of an input current doubler, a symmetrical switched-capacitor doubler and an active-clamp circuit. The input current doubler minimizes the input current ripple. The symmetrical switched-capacitor doubler is composed of two symmetrical quasi-resonant switched-capacitor circuits, which share the leakage inductance of the transformer as a resonant inductor. The rectifier diodes (switched-capacitor circuit) are turned off at the zero current switching (ZCS) condition, so that the reverse-recovery problem of the diodes is removed. In addition, the symmetrical structure results in an output voltage ripple reduction because the voltage ripples of the charge/pump capacitors cancel each other out. Meanwhile, the voltage stress of the rectifier diodes is clamped at half of the output voltage. In addition, the active-clamp circuit clamps the voltage surges of the switches and recycles the energy of the transformer leakage inductance. Furthermore, pulse-width modulation plus phase angle shift (PPAS) is employed to control the output voltage. The operation principle of the converter is analyzed and experimental results obtained from a 400W prototype are presented to validate the performance of the proposed converter.

• 전기학회논문지P
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• 제61권3호
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• pp.122-128
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• 2012

An interleaved boost converter has many advantages such as current ripple reduction, switching effective double, etc. Due to these advantages, the interleaved boost converter applies to the power factor correction circuit. However, there are almost no analysis results because the input voltage and current are time-varying system in the power factor correction application. Therefore, in this paper, the current ripples of the power factor correction circuit using single-phase boost dc-dc converter and 2-phase interleaved boost dc-dc converter are compared and analyzed in detail. In order to verify the validity, computer simulation and experimental are performed.