• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.3
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• pp.6-12
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• 1984

The basic binary quantized first-order digital phase locked loop (DPLL) is modified in order to reduce the aquisition time and steadyftate phase error. Adding the loop that corrects the phase difference by detecting the falling zero-crossing time, an effort for the improving the performance is performed and the performance compared with that of the basic DPLL. Using a graphical method, the phase locking processes of the modified DPLL for a phase step and a frequency step input are depicted visually in the absence of noise. The performance of the modified DPLL for a sinusoidal input added narrow band random noise is evaluated using the Chapman-Kolmogorov equation. This approach is verified by direct computer simulation. The steady-state phase error and the average aquisition time of the modified DPLL are compared with those of the basic DPLL, It is shown that the aquisition time of the modified DPLL is shortened about twice, also, as signal to noise ratio increases, the effect of the modification increases and the steady-state phase error approaches to zero.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.8 no.4
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• pp.53-58
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• 2008

This paper designs sigma-delta D/A Converter with a high resolution and low power consumption. It reorganizes the input data along LJ, RJ, I2S mode and bit mode to the output data of A/D converter. The D/A converter decodes the original analog signal through HBF, Hold and 5th CIFB(Cascaded Integrators with distributed Feedback as well as distributed input coupling) sigma-delta modulation blocks. It uses repeatedly the addition operation in instead of the multiply operation for the chip area and the performance. Also, the half band filters of similar architecture composed the one block and it used the sample-hold block instead of the sinc filter. We supposed simple D/A Converter decreased in area. The filters of the block analyzed using the matlab tool. The top block designed using the top-down method by verilog language. The designed block is fabricated using Samsung 0.35um CMOS standard cell library. The chip area is 1500*1500um.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.12A
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• pp.1174-1182
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• 2005

This paper, we propose a new channel Estimation method for MB-OFDM(Multi-Band OFDM) system that is suggested as one of standards in IEEE 802.15 TG3a for high data rate(110Mbps${\~}$480Mbps) WPAN system. The proposed method uses correlation characteristic of the PS(Packet Synchronization) sequence for timing synchronization. It can reduce the influence of noise compared with the conventional algorithm which based on LS(Least square) algorithm is redundancy without using the CE(Channel Estimation) Sequence for channel Estimation. We simulate both conventional method and proposed method for performance analysis in S-V channel environment which proposed by IEEE 802.15.3a. Simulation results show the proposed algorithm outperforms conventional algorithm about 1${\~}$1.5dB of Eb/NO.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.9
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• pp.912-918
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• 2014

In this paper, a VHF band multi channel phase discriminator for direction finding equipment using tripple baseline interferometer technique is proposed. In order to measure simultaneously phase difference between IF(Intermediate Frequency) signals of the direction finding equipment, phase discriminator was designed to have parallel structure with multi channel, the phase correlator of phase discriminator was designed with I, Q mixer for reducing number of components. And digital LUT(Look Up Table) was applied for compensating error of phase discriminator due to phase unbalance of RF components. The measured phase accuracy of fabricated phase discriminator was 2 degree RMS(Root Mean Square) at 30 dB SNR condition, which is superior to the phase accuracy of conventional product.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.3
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• pp.359-364
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• 2016

As cable TV networks have a media feature that is a broadband wire network, they can provide not only TV broadcasting services but also communication services. Accordingly, the cable TV network is mentioned as the optimal network for convergence of broadcasting and communication services. Recently, Available frequencies of the cable TV network have become insufficient as enhancement of video quality, increment of VoD service, and growth of high-speed internet service. This paper presents a new implementation method of switched digital video (SDV) technology that is introduced for obtaining additional frequency band. In the SDV system, only TV channels requested from viewer are sent and non-requested channels are dropped. The presented SDV uses a sharing method of TV broadcasting and communication service in a same frequency band. This method shows increase of spectrum efficient from switching of TV service channels without building a complex system.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.8 no.4
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• pp.363-372
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• 1997

We have developed the UHF CW/FM proximity sensor system. The UHF CW/FM Proximity Sensor is the system which recognizes the distance from the antenna to the target using the UHF band signal. To adjust sensing distance, we must change modulation frequency parameter or modulation index parameter. When we select the modulation frequency paramter for adjusting sensing distance, new modulation frequency generator and new band pass filter will be required. It is so inefficient that we choose modulation index parameters for adjusting sensing distance. In this paper, theoretical principles of the UHF CW/FM Proximity Sensor are analyzed and doppler signals for the distance from the antenna to the target are measured as the modulation index($\beta$) being changed. Three systems of which moduation indices are 38, 50, and 61 are made. We concluded that the sensing distance will decrease as the modulation index($\beta$) increases. It is in accord with the theory of this UHF CW/FM Proximity Sensor System.

• Journal of the Korea Society of Computer and Information
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• v.18 no.3
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• pp.27-34
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• 2013

A wideband patch antenna fed by an L-strip feeder is studied. The objective of this paper is to design small wideband antenna for 3G and 4G wireless mobile communication service. The enhanced features were confirmed and proved by comparing the proposed antenna with the antennae that have been reported in the relevant literatures. Measurement results confirm that an impedance bandwidth($VSWR{\leq}2$) of 636MHz(32.5%, fo=1,960MHz) is achieved at 3G and 4G frequency band for L-strip-fed triangular patch antenna. In general, probe feed has only the parasitic reactance caused by the probe, which reduces the bandwidth performance of the antenna. The experimental results proved that the effects of improvement could be achieved because the proposed antenna is capable of compensating the parasitic reactance from the feeding mechanism. The studied antenna can be designed easily for extension of array because it has simple structure.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.7
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• pp.778-785
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• 2010

The folded monopole antenna for applying mobile communications equipment and wireless devices is presented in this paper. By using the coplanar waveguide feed the operating bandwidth has improved. In addition, each individual resonant elements has occurred different capacitance through asymmetrical left and right ground planes; therefore, the bandwidth has kept and the impedance matching has stabilized. By measurement results, the impedance bandwidth under VSWR< 2.5:1 are $824{\sim}890$ MHz and the $1,500{\sim}2,170$ MHz, also radiation patterns has omni-directional characteristics. The maximum gains of the proposed antenna are 5.52, 0.64, 3.00, 0.94 and 1.85 dBi at 850, 1,575, 1,790, 1,930 and 2,050 MHz respectively. The proposed antenna will be adapted to the internal antenna of the mobile communication devices.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.6
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• pp.591-596
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• 2016

This paper presents a study on the subject for the design and implementation of high-speed frequency hopping RF transceiver used for tactical communications systems. Jump the transmission / reception frequency of the L-band to hop tens per second is possible by maximizing the immunity to interference, and is applicable to communication systems having a charging rotation function. To high-speed frequency hopping it is necessary to apply the necessary fast frequency hopping scheme DDS Driven PLL added. In this paper, the RF transceiver design and simulation analysis capabilities with fast frequency tactical communication systems, were implemented after the main test for functionality and performance. Was demonstrated hop high-speed jump tens per second through a test, the main transmission output, were measured RF key performance, such as received noise figure, by using the VSG and VSA generates a ${\pi}/4$ DQPSK modulated signal constellation and by EVM measurement that there is no problem in applying the communications system described above was pre-validated.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2017.10a
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• pp.621-622
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• 2017

In this paper, a low-complexity FFT processor is proposed for narrow-band interference signal cancellation based array antenna. The proposed FFT pocessor can support the variable length of 64, 128 and 512. By reducing number of non-tirval multipliers with mixed radix-4/2/4/2/4/2 algorithm and flexible multi-path delay commutator(MDC) architecture, the complexity of the proposed FFT processor is dramatically decreased. The proposed FFT processor was designed in Xilinx system generator and Implemented with Xilinx Virtex-7 FPGA. With the proposed architecture, the number of slices for the processor is 11454, and the number of DSP48s is 194.