• International Journal of Highway Engineering
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• v.17 no.4
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• pp.25-31
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• 2015

PURPOSES: Implementation and verification of the simple linear cohesive viscoelastic contact model that can be used to simulate dynamic behavior of sticky aggregates. METHODS: The differential equations were derived and the initial conditions were determined to simulate a free falling ball with a sticky surface from a ground. To describe this behavior, a combination of linear contact model and a cohesive contact model was used. The general solution for the differential equation was used to verify the implemented linear cohesive viscoelastic API model in the DEM. Sensitivity analysis was also performed using the derived analytical solutions for several combinations of damping coefficients and cohesive coefficients. RESULTS : The numerical solution obtained using the DEM showed good agreement with the analytical solution for two extreme conditions. It was observed that the linear cohesive model can be successfully implemented with a linear spring in the DEM API for dynamic analysis of the aggregates. CONCLUSIONS: It can be concluded that the derived closed form solutions are applicable for the analysis of the rebounding behavior of sticky particles, and for verification of the implemented API model in the DEM. The assumption of underdamped condition for the viscous behavior of the particles seems to be reasonable. Several factors have to be additionally identified in order to develop an enhanced contact model for an asphalt mixture.

• Journal of Broadcast Engineering
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• v.21 no.5
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• pp.792-802
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• 2016

Real time verification is necessary, since there are several features that cannot be verified through design simulation in the design of multiband soundbar system. And then this paper describes an implementation of an FPGA-based real-time verification system for a soundbar SoC with an embedded processor. It is verified a real-time performance test and a listening test which are several features in the design stage that cannot be verified through a design simulation. The measurement of quantitative specifications such as SNR, THD+N, frequency response, etc. as well as the listening test were performed through the implemented FPGA system, and it was verified that test results satisfied the target specifications.

• Journal of KIISE:Computer Systems and Theory
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• v.35 no.7
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• pp.332-339
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• 2008

Radio Frequency Identification (RFID) technology is an important part of infrastructures in ubiquitous computing. Although all products using tags is a target of these services, these products also are a target of attacking on user privacy and services using authentication problem between user and merchant, unfortunately. Presently, it is very important about security mechanism of RFID system and in this paper, we analyze the security protocol among many kinds of mechanisms to solve privacy and authentication problem using formal verification and propose a modified novel protocol. In addition, the possibility of practical implementation for proposed protocol will be discussed.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.5 no.10
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• pp.1783-1798
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• 2011

Recently, a cryptographic construct, called fuzzy vault, has been proposed for crypto-biometric systems, and some implementations for fingerprint have been reported to protect the stored fingerprint template by hiding the fingerprint features. In this paper, we implement the fuzzy fingerprint vault, combining fingerprint verification and fuzzy vault scheme to protect fingerprint templates. To implement the fuzzy fingerprint vault as a complete system, we have to consider several practical issues such as automatic fingerprint alignment, verification accuracy, execution time, error correcting code, etc. In addition, to protect the fuzzy fingerprint vault from the correlation attack, we propose an approach to insert chaffs in a structured way such that distinguishing the fingerprint minutiae and the chaff points obtained from two applications is computationally hard. Based on the experimental results, we confirm that the proposed approach provides higher security than inserting chaffs randomly without a significant degradation of the verification accuracy, and our implementation can be used for real applications.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.4 no.2
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• pp.87-95
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• 2003

Dynamic Programming Matching (DPM) is a mathematical optimization technique for sequentially structured problems, which has, over the years, played a major role in providing primary algorithms in pattern recognition fields. Most practical applications of this method in signature verification have been based on the practical implementational version proposed by Sakoe and Chiba [9], and il usually applied as a case of slope constraint p = 0. We found, in this case, a modified version of DPM by applying a heuristic (forward seeking) implementation is more efficient, offering significantly reduced processing complexity as well as slightly improved verification performance.

• The KIPS Transactions:PartB
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• v.10B no.4
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• pp.451-458
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• 2003

Dynamic Programming Matching (DPM) is a mathematical optimization technique for sequentially structured problems, which has, over the years, played a major role in providing primary algorithms in pattern recognition fields. Most practical applications of this method in signature verification have been based on the practical implementational version proposed by Sakoe and Chiba [9], and is usually applied as a case of slope constraint p = 0. We found, in this case, a modified version of DPM by applying a heuristic (forward seeking) implementation is more efficient, offering significantly reduced processing complexity as well as slightly improved verification performance.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.815-818
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• 1998

Hardware formal verification involves the use of analytical techniques to prove that the implementation of a system confroms to the specification. The specification could be a set of properties that the system must have or it could be an alternative representation of the system behavior. We can represent our behavioral specification to be written in VHDL coding. In this paper, we proposed a new hardware design verification method. For theis method, we assumed that a verification pattern already exists and try to make an algorithm to find a place where a design error occurred. This method uses an hierarchical approach by making control flow graph(CFG) hierarchically. From the simulation, this method was turned out to be very effective that all the assumed design errors could be detected.

• Proceedings of the Korea Society for Simulation Conference
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• 2005.05a
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• pp.100-105
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• 2005

Development of complex discrete event simulators requires cooperation between domain experts and modeling experts who involve the development. With the cooperation the domain experts derive user requirement and modeling experts transform the requirement to a simulation model. This paper proposes a method for consistency verification of simulation model in DEVS formalism against the user requirement in UML diagrams. It also presents an automated tool, called VeriDEVS, which implements the proposed method. Inputs of VeriDEVS are three UML diagrams, namely use case, class and sequence diagrams, and DEVS Graph, all in Visio; outputs of a verification result is represented in PowerPoint files.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.9
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• pp.1781-1785
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• 2007

We propose a new enhanced graphical user interface and algorithm for dynamic signature verification using Smart-phone. Also, we describe the performance results of our dynamic signature verification system, which determine the authentication of signatures by comparing and analyzing various dynamic data shape of the signature, writing speed, slant of shape, and the order and number of strokes for personal signatures using an electronic pen, expecting the system to be understood and utilized widely in the industrial field.

• ETRI Journal
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• v.28 no.3
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• pp.320-328
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• 2006

Using biometrics to verify a person's identity has several advantages over the present practice of personal identification numbers (PINs) and passwords. To gain maximum security in a verification system using biometrics, the computation of the verification as well as the storing of the biometric pattern has to take place in a smart card. However, there is an open issue of integrating biometrics into a smart card because of its limited resources (processing power and memory space). In this paper, we propose a speaker verification algorithm using a support vector machine (SVM) with a very few features, and implemented it on a 32-bit smart card. The proposed algorithm can reduce the required memory space by a factor of more than 100 and can be executed in real-time. Also, we propose a hardware design for the algorithm on a field-programmable gate array (FPGA)-based platform. Based on the experimental results, our SVM solution can provide superior performance over typical speaker verification solutions. Furthermore, our FPGA-based solution can achieve a speed-up of 50 times over a software-based solution.