• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.3
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• pp.57-65
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• 1995

This paper presents a new classified vector quantization (VQ) technique using a neural network model in the transform domain. Prior to designing a codebook, the proposed approach extracts class features from a set of images using self-organizing feature map (SOFM) that has the pattern recognition characteristics and the same as VQ objective. Since we extract the class features from the training images unlike previous approaches, the reconstructed image quality is improved. Moreover, exploiting the adaptivity of the neural network model makes our approach be easily applied to designing a new vector quantizer when the processed image characteristics are changed. After the generalized BFOS algorithm allocates the given bits to each class, codebooks of each class are also generated using SOFM for the maximal reconstructed image quality. In experimental results using monochromatic images, we obtained a good visual quality in the reconstructed image. Also, PSNR is comparable to that of other classified VQ technique and is higher than that of JPEG baseline system.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.1
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• pp.105-113
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• 1998

A new image processor is implemented for high-speed digital copiers and facsimiles. The imgage processor performs CCD and CIS interface, pre-processing, enlargement andreduction of gray level image, and various halftoning algorithms. Implemented halftoning algorithms are simple thresholding, fuzzy based mixed mode thresholding, dithering, and edge enhanced error diffusion. The result of binarization is transferred to a printer with serial or paralel output ports. Line by line pipelined data prodessing architecture is employed with time sharing access of the external memory. In receiving mode, it converts the resolution of received binary image for compatibility with conventional facsimile. In copy mode, a line of A3 paper with 400 dpi is processed with in 2.5 ms. The prototype of image processor was implemented usig Laser Programmable Gate Array (LPGA) with 0.8.mu.m technology.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 1996.06b
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• pp.50-55
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• 1996

Multimedia boom has happened worldwide these days. In multimedia, we use several kinds of media such as character, figure, voice, music, still images, moving picture etc.. Then I think image including moving picture is the most effective and important media for human being. Creating digital images using a computer has the following two main approaches, depending on how the computer is used. 1. CG Technology. Created images, produced through computer graphics. 2. Digital Image Processing. Images processed through digital image processing technologies. Approach (1) is very popular as Computer Graphics. Two-dimensional and three-dimensional computer graphics techniques are used over wide applications today. On the other hand, Approach (2), which uses digital image processing technology, has been attracting attention lately, in the filed of movies and television. In this report, I will introduce these approaches of CG and digital image processing, and show some application fields such as current movies.

• Journal of Multimedia Information System
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• v.5 no.2
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• pp.79-82
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• 2018

Due to the handheld holding of smartphones and the presence of light leakage and non-balanced contrast, the detection of the retina area in smartphone-captured fundus images is more challenging than retinography-captured fundus images. This paper presents a computationally efficient image processing pipeline in order to detect and enhance the retina area in smartphone-captured fundus images. The developed pipeline consists of five image processing components, namely point spread function parameter estimation, deconvolution, contrast balancing, circular Hough transform, and retina area extraction. The results obtained indicate a typical fundus image captured by a smartphone through a D-EYE lens is processed in 1 second.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.3
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• pp.297-306
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• 1992

Algorithms for implementing one chip binary image processor has been studied. In this paper, image quality improvement algorithms, for the data pre-processed with shading and gamma correction after digitizing the analog signal from CCD or CIS, such as : Improved high quality binarization algorithm is suggested. Error diffusion algorithms for high quality half-tone images is analyzed, Fuzzy Theory based mixed mode algorithm is suggested.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2000.05a
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• pp.352-355
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• 2000

In this paper, we propose an adaptive thresholding for edge detection. first, we got histograms for background image and image with moving object, respectively. Then we make difference histogram between histograms of background and object image. A thresholding value is decided using gradient of peak to peak in the difference histogram. The experimentation is processed using a moving car in the road. The result is that edge is detected well regardless of the brightness.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.581-584
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• 1999

In order to retrieve the rotated image within database by the content based image retrieval system, the algorithms with rotation robustness is usually applied in the procedure of the feature extraction. In that case, it requires much calculation time for feature extraction and much indexed data for feature indexing. Thus. in this paper. we propose the rotation robust algorithm using the block variance of the projected vector. The algorithm does not require additional calculation for feature extraction and is executed within query time by comparing the extracted data. Proposed method can be processed through database including various size of images with shape information and executed with fast response time in implementation.

• The Transactions of the Korea Information Processing Society
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• v.6 no.8
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• pp.2222-2232
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• 1999

This paper proposed a Systolic Arrays architecture for computing edge detection on images. It is very difficult to be processed images to real time because of operations of local operators. Local operators for computing edge detection are to be used in many image processing tasks, involve replacing each pixel in an image with a value computed within a local neighborhood of that pixel. Computing such operators at the video rate requires a computing power which is not provided by conventional computer. Through computationally expensive, it is highly regular. Thus, this paper presents a systolic arrays for tasks such as edge detection and laplacian, which are defined in terms of local operators.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.297-298
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• 2006

In this paper, we propose a real-time surveillance system for security of important area such as military bases, prisons, and strategic infra structures. The proposed system recognizes the movement of objects in dark environments. First, the Multi-scale retinex (MSR) is processed to enhance the contrast of image captured in dark environments. Then, the enhanced input image is subtracted with the background image. Finally, each bounding box enclosing each objects are tracked. The center point of each bounding box obtained by the proposed algorithm provides more accurate tracking information. Experimental results show that the proposed system provides good performance even though an object moves very fast and the background is quite dark.

• Journal of the Korea Society of Computer and Information
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• v.21 no.11
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• pp.39-47
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• 2016

In this paper, we propose an approach for real time computation of rayleigh CLAHE using a FPGA. The contrast enhancement technique should be applied in thermal equipment having a low contrast image. And thermal equipment must be processed in real time. The CLAHE is an improved algorithm based Histogram Equalization, but the HW design is complex. A value greater than a given threshold in CLAHE should be equally distributed on the other histogram bin, this process requires iterations for the distribution. But implementation of this processing in the FPGA is constrained, so this section was implemented on the assumption of the histogram distribution or modified the operation process or implemented separately in the CPU. In this paper, we designed a distinct redistribution operation in two stages. So FPGA was designed for easy, this was designed to be distributed evenly without the assumptions and constraints. In addition, we have designed a CLAHE with the rayleigh distribution to the FPGA. The simulation shows that the proposed method provides a better image quality in the thermal image.