• Title/Summary/Keyword: Image chip

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A Hardware Implementation of Image Scaler Based on Area Coverage Ratio (면적 점유비를 이용한 영상 스케일러의 설계)

  • 성시문;이진언;김춘호;김이섭
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.3
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    • pp.43-53
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    • 2003
  • Unlike in analog display devices, the physical screen resolution in digital devices are fixed from the manufacturing. It is a weak point on digital devices. The screen resolution displayed in digital display devices is varied. Thus, interpolation or decimation of the resolution on the display is needed to make the input pixels equal to the screen resolution., This process is called image scaling. Many researches have been developed to reduce the hardware cost and distortion of the image of image scaling algorithm. In this paper, we proposed a Winscale algorithm. which modifies the scale up/down in continuous domain to the scale up/down in discrete domain. Thus, the algorithm is suitable to digital display devices. Hardware implementation of the image scaler is performed using Verilog XL and chip is fabricated in a 0.5${\mu}{\textrm}{m}$ Samsung SOG technology. The hardware costs as well as the scalabilities are compared with the conventional image scaling algorithms that are used in other software. This Winscale algorithm is proved more scalable than other image-scaling algorithm, which has similar H/W cost. This image-scaling algorithm can be used in various digital display devices that need image scaling process.

Renewable Iris Authentication Algorithm in Mobile System

  • Lee Kwang Je;Lee Soon Seok;Kim Sin Hong;Cho Do Hyun
    • Proceedings of the IEEK Conference
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    • 2004.08c
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    • pp.592-595
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    • 2004
  • Recently the numbers of patent about the technology for mobile payment with Ie or bluetooth-chip are being increased more and more. The reasons of patent increment for mobile payment are advancement of wireless internet technology and rising of customer's request for it. The customer wants to be able to pay for purchase, tax and aid with own mobile phone. So every mobile service provider applies for patents about that competitively. And in the near future the biometrics is generalized in the mobile payment system. Especially the payment service of iris recognition is significant technique in this area for the future prospect. The biometrics of iris is an accurate authentication method because it has about 250 distinguish parameters to the finger print's 30. The biometrics of iris can recognize and identify a person for 2 seconds. But the image of iris is changed by transformation of body in the life. And the existing iris authentication system has problem that can be miss-recognized. In this paper, we propose the new method that reduces miss-recognizing rate with Renewable Iris Authentication Algorithm(RIAA) in mobile system.

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Wafer-Level Three-Dimensional Monolithic Integration for Intelligent Wireless Terminals

  • Gutmann, R.J.;Zeng, A.Y.;Devarajan, S.;Lu, J.Q.;Rose, K.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.4 no.3
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    • pp.196-203
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    • 2004
  • A three-dimensional (3D) IC technology platform is presented for high-performance, low-cost heterogeneous integration of silicon ICs. The platform uses dielectric adhesive bonding of fully-processed wafer-to-wafer aligned ICs, followed by a three-step thinning process and copper damascene patterning to form inter-wafer interconnects. Daisy-chain inter-wafer via test structures and compatibility of the process steps with 130 nm CMOS sal devices and circuits indicate the viability of the process flow. Such 3D integration with through-die vias enables high functionality in intelligent wireless terminals, as vertical integration of processor, large memory, image sensors and RF/microwave transceivers can be achieved with silicon-based ICs (Si CMOS and/or SiGe BiCMOS). Two examples of such capability are highlighted: memory-intensive Si CMOS digital processors with large L2 caches and SiGe BiCMOS pipelined A/D converters. A comparison of wafer-level 3D integration 'lith system-on-a-chip (SoC) and system-in-a-package (SiP) implementations is presented.

The Study of WET Cleaning Effect on Deep Trench Structure for Trench MOSFET Technology (Trench MOSFET Technology의 Deep Trench 구조에서 WET Cleaning 영향에 대한 연구)

  • Kim, Sang-Yong;Jeong, Woo-Yang;Yi, Keun-Man;Kim, Chang-Il
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.88-89
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    • 2009
  • In this paper, we investigated about wet cleaning effect as deep trench formation methods for Power chip devices. Deep trench structure was classified by two methods, PSU (Poly Stick Up) and Non-PSU structure. In this paper, we could remove residue defect during wet. cleaning after deep trench etch process for non-PSU structure device as to change wet cleaning process condition. V-SEM result showed void image at the trench bottom site due to residue defect and residue component was oxide by EDS analysis. In order to find the reason of happening residue defect, we experimented about various process conditions. So, defect source was that oxide film was re-deposited at trench bottom by changed to hydrophobic property at substrate during hard mask removal process. Therefore, in order to removal residue defect, we added in-situ SCI during hard mask removal process, and defect was removed perfectly. And WLR (Wafer Level Reliability) test result was no difference between normal and optimized process condition.

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An embedded vision system based on an analog VLSI Optical Flow vision sensor

  • Becanovic, Vlatako;Matsuo, Takayuki;Stocker, Alan A.
    • Proceedings of the Korea Society of Information Technology Applications Conference
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    • 2005.11a
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    • pp.285-288
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    • 2005
  • We propose a novel programmable miniature vision module based on a custom designed analog VLSI (aVLSI) chip. The vision module consists of the optical flow vision sensor embedded with commercial off-the-shelves digital hardware; in our case is the Intel XScale PXA270 processor enforced with a programmable gate array device. The aVLSI sensor provides gray-scale imager data as well as smooth optical flow estimates, thus each pixel gives a triplet of information that can be continuously read out as three independent images. The particular computational architecture of the custom designed sensor, which is fully parallel and also analog, allows for efficient real-time estimations of the smooth optical flow. The Intel XScale PXA270 controls the sensor read-out and furthermore allows, together with the programmable gate array, for additional higher level processing of the intensity image and optical flow data. It also provides the necessary standard interface such that the module can be easily programmed and integrated into different vision systems, or even form a complete stand-alone vision system itself. The low power consumption, small size and flexible interface of the proposed vision module suggests that it could be particularly well suited as a vision system in an autonomous robotics platform and especially well suited for educational projects in the robotic sciences.

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Optimization of Heatsink and Analysis of Thermal Property in 75W LED Module for Street Lighting (75W급 LED 가로등 모듈의 방열판 최적화와 열특성 분석)

  • Lee, Seung-Min;Lee, Se-Il;Yang, Jong-Kyung;Lee, Jong-Chan;Park, Dae-Hee
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.59 no.3
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    • pp.609-613
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    • 2010
  • In this paper, we optimized and simulated the heatsink of 75W LED module for street lighting and evaluated the optical properties with the manufactured heatsink. the structure of LED package make simple as chip and heatslug and thermal flow is analyzed by using the FEM(Finite Element Method) with CFdesign V10. Also, we measured the temperature of heatsink and evaluated the optical properties with infrared thermal image camera and integrated sphere system for luminous flux in $1\;[m^3]$ box. As results, Heatsink optimized in 3 mm pin thickness, 6 mm base thickness and 16 number of pin count by using Heatsink-designer and got the results which is the temperature of $47.37\;[^{\circ}C]$ and thermal resistance of $0.48407\;[W/^{\circ}C]$. In thermal flow simulation, the temperature of heatsink decreased from $51.54\;[^{\circ}C]$ to $51.51\;[^{\circ}C]$ and the temperature of heatsink by the time in real measurement decreased from $47.03\;[^{\circ}C]$ to $46.87\;[^{\circ}C]$. Moreover, we improve 0.68 % in the decreased ratio of the luminous flux.

A Fast Implementation of JPEG and Its Application to Multimedia Service in Mobile Handset

  • Jeong Gu-Min;Jung Doo-Hee;Na Seung-Won;Lee Yang-Sun
    • Journal of Korea Multimedia Society
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    • v.8 no.12
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    • pp.1649-1657
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    • 2005
  • In this paper, a fast implementation of JPEG is discussed and its application to multimedia service is presented for mobile wireless internet. A fast JPEG player is developed based on several fast algorithms for mobile handset. In the color transformation, RCT is adopted instead of ICT for JPEG source. For the most time-consuming DCT part, the binDCT can reduce the decoding time. In upsampling and RGB conversion, the transformation from YCbCr to RGB 16 bit is made at one time. In some parts, assembly language is applied for high-speed. Also, an implementation of multimedia in mobile handset is described using MJPEG (Motion JPEG) and QCELP(Qualcomm Code Excited Linear Prediction Coding). MJPEG and QCELP are used for video and sound, which are synchronized in handset. For the play of MJPEG, the decoder is implemented as a S/W upon the MSM 5500 baseband chip using the fast JPEG decoder. For the play of QCELP, the embedded QCELP player in handset is used. The implemented multimedia player has a fast speed preserving the image quality.

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Nonlinear matching measure for the analysis of on-off type microarray image (온-오프 형태의 DNA 마이크로어레이 영상 분석을 위한 비선형 정합도)

  • Ryu Mun ho;Kim Jong dae
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.3C
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    • pp.112-118
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    • 2005
  • In this paper, we propose a new nonlinear matching measure for automatic analysis of the on-off type DNA microarray images in which the hybridized spots are detected by the template matching method. The proposed measure is obtained by binary-thresholding over the whole template region and taking the number of white pixels inside the spotted area. This measure is compared with the normalized covariance in terms of the classification ability of the successfulness of the locating markers. The proposed measure is evaluated for the scanned images of HPV DNA microarrays where the marker locating is a critical issue because of the small number of spots. The targeting spots of HPV DNA chips are designed for genotyping 22 types of the human papilloma virus(HPV). The proposed measure is proven to give more discriminative response reducing the miss cases of the successful marker locating.

Development and Application of a Miniature Stereo-PIV System (Miniature Stereo-PIV 시스템의 개발과 응용)

  • Kim, K.C.;Chetelat, Olivier;Kim, S.H.
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.27 no.11
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    • pp.1637-1644
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    • 2003
  • Stereoscopic particle image velocimetry is a measurement technique to acquire three dimensional velocity field by two cameras. With a laser sheet illumination, the third velocity component can be deduced from out-of$.$plane velocity components using a stereoscopic matching method. Most industrial fluid flows are three dimensional turbulent flows, so it is necessary to use the stereoscopic PIV measurement method. However the existing stereoscopic PIV system seems hard to use since it is very expensive and complex. In this study we have developed a Miniature Stereo-PIV(MSPIV) system based on the concept of the Miniature PIV system which we have already developed. In this paper, we address the design and some primitive experimental results of the Miniature Stereo-PIV system. The Miniature Stereo-PIV system features relatively modest performances, but is considerably smaller, cheaper and easy to handle. The proposed Miniature Stereo-PIV system uses two one-chip-only CMOS cameras with digital output. Only two other chips are needed, one for a buffer memory and one for an interfacing logic that controls the system. Images are transferred to a personal computer (PC) via its standard parallel port. No extra hardware is required (in particular, no frame grabber board is needed).

MTM MEASUREMENT OF THE LENS ON THE KITSAT-1 EARTH IMAGING SYSTEM (우리별 인공위성의 지상 촬영 장치에 쓰여진 렌즈의 MTF 측정)

  • 류광선;민경욱;유상근
    • Journal of Astronomy and Space Sciences
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    • v.11 no.2
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    • pp.320-326
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    • 1994
  • The KITSAT-1 (Auguse, 1992) and the KITSAT-2(September, 1993) were successfully launched and operated by the SatRec(Satellite Research Center). Both carry the CCD cameras to monitor the image of the earth. We used the camera bench type automatic equipment in the KSRI(Korea Standards Research Institute) to measure the MTF(Modulation Transfer Function) value of the lens attached to the CCD camera. We measured the tangential MTF and the sagital MTF by varing the f-number and the field angle. According to the result, the light from a point source is focused within one pixel of the CCD chip when the f-number is smaller than 4.0, and the MTF value becomes smaller as the field angle increases.

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