• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.8
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• pp.959-965
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• 1988

Zinc diffusion characteristics and its applicabilities have been studied using an open-tube system. Thermal decomposition of arsenide(As) at gallium arsenide(GaAs) wafer surface was well inhibited by using Ga: poly-GaAs: Zn compositon as a diffusion source. Junction depth was obtained as 4.6x10**7\ulcorner exp)-1.25/kT) where activation energy of diffusion was 1.25eV. From Boltzmann-matano analysis, it could be identified that concentration dependencies of Zn diffusivity well consisted with those of kick-out model. The ideality factor of p+-n junction formed by Zn diffusion was about 1.6 and infrared light intensity was linearly varied in the range of sixty folds. It is concluded frodm these results that Zn diffuses according to kick-out model, and open-tube method is applicable to compound semiconductor devices.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.1
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• pp.65-70
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• 1994

GaAs power MESFETs with 0.8$\mu$m gate lengths are fabricated using image reversal (IR) methods on the wafer with an undoped surface layer grown by MOCVD. The fabricated GaAs power MESFETs with an undoped surface layer show that an ideality factor 1.17, a built-in potential 0.83 V, a pinch-off voltage -2.7 V, a specfic contact resistance 1.21$\times$10$^{5}$ ~3.42$\times$10$^{2}$$\Omega$-cm$^{2}$ and an extrinsic g$_{m}$ = 103.5 mS/mm. The maximum RF output power densities of the 0.8$\mu$m devices are 360 mW/mm and 499 mW/mm, and power added efficiencies 29.67% and 29.05%, for the unit gate width 150$\mu$m and 200$\mu$m at 12 GHz.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.9
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• pp.114-120
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• 1994

We have been successfully fabricated the low nois HEMT device with AlGaAs and GaAs structure. The epitazial layer with n-type AlgaAs and undoped GaAs was grown by molecular beam epitaxy(MBE) system. Ohmic resistivity of the ource and drain contact is below 5${\times}10^{6}{\Omega}{\cdot}cm^{2}$ by the rapid thermal annealing (RTA) process. The ideality factor of the Schottky gate is below 1.6 and the gate material was Ti/Pt/Au. The HEMTs with 0.25$\mu$m-long and 200$\mu$m-wide gates have exhibited a noise figure of 0.65dB with associated gain of 9dB at 12GHz, and a transconductance of 208mS/mm.

• Proceedings of the KIEE Conference
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• 1999.11d
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• pp.938-940
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• 1999

We have fabricated SiC Schottky diode for high temperature applications. SiC thin film for drift region has been deposited by ICP-CVD. In order to establish metallization conditions, we have extracted the device parameters of the Schottky diode from the forward I-V characteristics and the C-V characteristics as a function of temperature. The ideality factor was varied from 2.07 to 1.15 and the barrier height was also varied from 1.26eV to 1.92eV with increase of temperature. The reverse blocking voltage was 183 V.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1996.11a
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• pp.160-163
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• 1996

To develope output characteristics of GaAs MESFET, which utilized in high frequency ranges, $Al_{0.2}$Ga$_{0.8}$As/GaAs layer was used. In this case, to minimize effects of deep-level in $Al_{0.2}$Ga$_{0.8}$As/GaAs layer, aluminium mole fraction was design to 0.2. HP 4145B was used in measurement, I$_{dss}$ was 25mA when V$_{G}$=0. Maximum transconductance was 168.75mS/mm, electron mobility was 3750 $\textrm{cm}^2$/V-s, therefore, it must be suitable for active device in MMIC. Also, Ideality factor was 1.26, which was similar to that of ideal schottky diode.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1996.11a
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• pp.349-352
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• 1996

When the ideality factor of collector current of AIGaAs/GaAs Heterojunction Bipolar Transistors (HBTs) is larger than unity, conventional $I_{CO}$ / $T^2$ versus 1000/T plot used in the determination of the barrier height of base-emitter junction of HBT was deviated from the straight line. We introduced the effective temperature $T_{eff}$ as nT in the Thermionic-emission equation. The modified $I_{CO}$ /TB versus 1000/ $T_{eff}$ plot was on the straight line in the temperature range considered. The activation energy obtained from the modified plot is 1.61 eV. The conduction band discontinuity calculated using this value was 0.305 eV and this value is coincident with the generally accepted value of 0.3 eV. eV.

• Proceedings of the KIEE Conference
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• 2009.04b
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• pp.253-255
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• 2009

박막태양전지에서 빛을 처음 받아들이는 p-layer는 전체적인 태양전지 특성에 큰 영향을 준다. 본 논문에서는 p-layer의 gas flow rate를 가변하여 증착한 P-I-N cell을 통해 DIV를 측정하고 분석하였다. 더불어 gas flow rate에 따른 p-layer의 특성변화를 토대로 시뮬레이션을 진행하여 실제 소자와 비교하여 보았다. simulation da와 experimental data를 비교해보면 전체적으로 유사한 경향성을 보이며 saturation current는 큰 차이를 보이지 않았으나 ideality factor와 series resistance에서 real device가 비교적 큰 값을 나타내는 것을 볼 수 있었다. 본 연구는 simulation data를 기반으로 real device를 제작하는데 큰 도움이 될 것이다.

• Current Photovoltaic Research
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• v.3 no.4
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• pp.107-111
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• 2015

Current characteristic curve of an illuminated solar cell was used to determine its reverse saturation current density ($J_0$), ideality factor (n) and resistances, by using numerical diode simulation. High efficiency amorphous silicon, heterojunction crystalline Si (HIT), plastic and organic-inorganic halide perovskite solar cell shows n=3.27 for a-Si and n=2.14 for improved HIT cell as high and low n respectively, while the perovskite and plastic cells show n=2.56 and 2.57 respectively. The $J_0$ of these cells remain within $7.1{\times}10^{-7}$ and $1.79{\times}10^{-8}A/cm^2$ for poorer HIT and improved perovskite solar cell respectively.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.224.2-224.2
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• 2013

본 연구에서는 CIGS박막 태양전지의 온도 및 시간 인가에 따른 전기적 특성 변화를 분석하였다. 실험에서는 온도 스트레스를 $25^{\circ}C$, $50^{\circ}C$, $100^{\circ}C$, $150^{\circ}C$, $200^{\circ}C$에서 각각 10시간씩 인가한 후에 Dark I-V와 C-V측정을 통해 전기적 특성 변화를 분석하였다. $25^{\circ}C$일 때를 초기 온도로 하여 특성을 측정한 것과 온도별로 노출시킨 후에 측정한 것을 비교했을 때 소자의 효율은 $100^{\circ}C$에서 감소하기 시작하였고, 인가한 온도가 높을수록 점점 많이 감소하는 모습이 나타났다. 이와 비슷하게 I-V그래프와 C-V그래프의 모습도 초기 값과 비교해서 변화하는 모습이 나타났고, 온도가 높아질수록 점점 변화하는 양이 증가하였다. I-V그래프에서 Diode ideality factor는 온도변화에 따라 초기 값 대비 증가하는 모습이 나타났다. 온도에 노출되기 전보다 노출된 후에 current와 capacitance가 감소하는 경향을 보이는데, 이는 온도의 영향으로 인해 소자의 결함이 증가하여 전하들의 반응에 영향을 주었기 때문으로 판단된다.

• Journal of the Semiconductor & Display Technology
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• v.16 no.2
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• pp.39-43
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• 2017

It was confirmed that the silicon thin films fabricated on the p-Si (100) substrates by using DIPAS (DiIsoPropylAminoSilane) and TDMA-Sb (Tris-DiMethylAminoAntimony) sources by RPCVD method were amorphous and n-type silicon. The fabricated amorphous n-type silicon films had electron carrier concentrations and electron mobilities ranged from $6.83{\times}10^{18}cm^{-3}$ to $1.27{\times}10^{19}cm^{-3}$ and from 62 to $89cm^2/V{\cdot}s$, respectively. The ideality factor of the pn junction diode fabricated on the p-Si (100) substrate was about 1.19 and the efficiency of the fabricated pn solar cell was 10.87%.