• 제목/요약/키워드: ITO Deposition

검색결과 437건 처리시간 0.039초

유기 전계발광소자의 제작과 특성 연구 (Preparation and Properties of Organic Electroluminescent Devices)

  • 노준서;장호정
    • 마이크로전자및패키징학회지
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    • 제9권1호
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    • pp.9-13
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    • 2002
  • 최근, 효율적인 다층박막 구조로된 풀칼라 유기 전계발광소자 (organic electroluminescient device, OELD)의 시제품이 개발된바 있다. 본 연구에서는 ITO (indium tin oxide)/glass 투명기판위에 다층구조의 OELD 소자를 진공 열증착법으로 제작하였다. 사용된 저분자 유기화합물은 전자수송 및 주입층으로 $Alq_3$(trim-(8-hydroxyquinoline)aluminum)와 CTM (carrier transfer material) 물질을 사용하였고, 정공수송 덴 주입층으로는 TPD (triphenyl-diamine)와 CuPc (copper phthalocyanine)를 각각 증착하였다. 발광휘도는 임계전압 10 V 이상에서 급격히 증가하였으며, $A1/CTM/Alq_3$/TPD/1TO 구조로된 OELDs 소자의 경우- l7 V전압에서 430 cd/$m^2$의 휘도특성과 파장 512 nm의 녹색 발광을 나타내었다. 한편 $Li-A1/Alq_3$/TPD/CuPC/1TO 다층구조로된 소자의 발광파장은 508 nm 이며, 발광휘도는 17 V에서 650 cd/$m^2$의 값을 얻을 수 있었다. Li-Al 전극을 갖는 다층구조에서 발광휘도의 증가는 정공주입층인 CuPc의 적층으로 발광층에서 재결합 효율이 개선되었기 때문이며, 또한 Li-Al 전극의 경우 Al전극에 비해 낮은 일함수(work function)를 갖기 때문으로 판단된다.

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Investigation charge trapping properties of an amorphous In-Ga-Zn-O thin-film transistor with high-k dielectrics using atomic layer deposition

  • 김승태;조원주
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.264-264
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    • 2016
  • 최근에 charge trap flash (CTF) 기술은 절연막에 전하를 트랩과 디트랩 시킬 때 인접한 셀 간의 간섭현상을 최소화하여 오동작을 줄일 수 있으며 낸드 플래시 메모리 소자에 적용되고 있다. 낸드 플래시 메모리는 고집적화, 대용량화와 비휘발성 등의 장점으로 인해 핸드폰, USB, MP3와 컴퓨터 등에 이용되고 있다. 기존의 실리콘 기반의 플래시 메모리 소자는 좁은 밴드갭으로 인해 투명하지 않고 고온에서의 공정이 요구되는 문제점이 있다. 따라서, 이러한 문제점을 개선하기 위해 실리콘의 대체 물질로 산화물 반도체 기반의 플래시 메모리 소자들이 연구되고 있다. 산화물 반도체 기반의 플래시 메모리 소자는 넓은 밴드갭으로 인한 투명성을 가지고 있으며 저온에서 공정이 가능하여 투명하고 유연한 기판에 적용이 가능하다. 다양한 산화물 반도체 중에서 비정질 In-Ga-Zn-O (a-IGZO)는 비정질임에도 불구하고 우수한 전기적인 특성과 화학적 안정성을 갖기 때문에 많은 관심을 받고 있다. 플래시 메모리의 고집적화가 요구되면서 절연막에 high-k 물질을 atomic layer deposition (ALD) 방법으로 적용하고 있다. ALD 방법을 이용하면 우수한 계면 흡착력과 균일도를 가지는 박막을 정확한 두께로 형성할 수 있는 장점이 있다. 또한, high-k 물질을 절연막에 적용하면 높은 유전율로 인해 equivalent oxide thickness (EOT)를 줄일 수 있다. 특히, HfOx와 AlOx가 각각 trap layer와 blocking layer로 적용되면 program/erase 동작 속도를 증가시킬 수 있으며 넓은 밴드갭으로 인해 전하손실을 크게 줄일 수 있다. 따라서 본 연구에서는 ALD 방법으로 AlOx와 HfOx를 게이트 절연막으로 적용한 a-IGZO 기반의 thin-film transistor (TFT) 플래시 메모리 소자를 제작하여 메모리 특성을 평가하였다. 제작 방법으로는, p-Si 기판 위에 열성장을 통한 100 nm 두께의 SiO2를 형성한 뒤, 채널 형성을 위해 RF sputter를 이용하여 70 nm 두께의 a-IGZO를 증착하였다. 이후에 소스와 드레인 전극에는 150 nm 두께의 In-Sn-O (ITO)를 RF sputter를 이용하여 증착하였고, ALD 방법을 이용하여 tunnel layer에 AlOx 5 nm, trap layer에 HfOx 20 nm, blocking layer에 AlOx 30 nm를 증착하였다. 최종적으로, 상부 게이트 전극을 형성하기 위해 electron beam evaporator를 이용하여 platinum (Pt) 150 nm를 증착하였고, 계면 결함을 최소화하기 위해 퍼니스에서 질소 가스 분위기, $400^{\circ}C$, 30 분의 조건으로 열처리를 했다. 측정 결과, 103 번의 program/erase를 반복한 endurance와 104 초 동안의 retention 측정으로부터 큰 열화 없이 메모리 특성이 유지되는 것을 확인하였다. 결과적으로, high-k 물질과 산화물 반도체는 고성능과 고집적화가 요구되는 향후 플래시 메모리의 핵심적인 물질이 될 것으로 기대된다.

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RF 마그네트론 스퍼터로 증착된 In2O3 박막의 질소분위기 열처리에 따른 특성변화 (Effect of Annealing in a Nitrogen Atmosphere on the Properties of In2O3 Films Deposited with RF Magnetron Sputtering)

  • 공영민;이영진;허성보;이학민;서민수;김유성;김대일
    • 한국재료학회지
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    • 제22권1호
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    • pp.24-28
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    • 2012
  • $In_2O_3$ films were deposited by RF magnetron sputtering on a glass substrate and then the effect of post deposition annealing in nitrogen atmosphere on the structural, optical and electrical properties of the films was investigated. After deposition, the annealing process was conducted for 30 minutes at 200 and $400^{\circ}C$. XRD pattern analysis showed that the as deposited films were amorphous. When the annealing temperature reached 200-$400^{\circ}C$, the intensities of the $In_2O_3$ (222) major peak increased and the full width at half maximum (FWHM) of the $In_2O_3$ (222) peak decreased due to the crystallization. The films annealed at $400^{\circ}C$ showed a grain size of 28 nm, which was larger than that of the as deposited amorphous films. The optical transmittance in the visible wavelength region also increased, while the electrical sheet resistance decreased. In this study, the films annealed at $400^{\circ}C$ showed the highest optical transmittance of 76% and also showed the lowest sheet resistance of $89{\Omega}/\Box$. The figure of merit reached a maximum of $7.2{\times}10^{-4}{\Omega}^{-1}$ for the films annealed at $400^{\circ}C$. The effect of the annealing on the work-function of $In_2O_3$ films was considered. The work-function obtained from annealed films at $400^{\circ}C$ was 7.0eV. Thus, the annealed $In_2O_3$ films are an alternative to ITO films for use as transparent anodes in OLEDs.

저온 공정 온도에서 $Al_2O_3$ 게이트 절연물질을 사용한 InGaZnO thin film transistors

  • 우창호;안철현;김영이;조형균
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2010년도 하계학술대회 논문집
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    • pp.11-11
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    • 2010
  • Thin-film-transistors (TFTs) that can be deposited at low temperature have recently attracted lots of applications such as sensors, solar cell and displays, because of the great flexible electronics and transparent. Transparent and flexible transistors are being required that high mobility and large-area uniformity at low temperature [1]. But, unfortunately most of TFT structures are used to be $SiO_2$ as gate dielectric layer. The $SiO_2$ has disadvantaged that it is required to high driving voltage to achieve the same operating efficiency compared with other high-k materials and its thickness is thicker than high-k materials [2]. To solve this problem, we find lots of high-k materials as $HfO_2$, $ZrO_2$, $SiN_x$, $TiO_2$, $Al_2O_3$. Among the High-k materials, $Al_2O_3$ is one of the outstanding materials due to its properties are high dielectric constant ( ~9 ), relatively low leakage current, wide bandgap ( 8.7 eV ) and good device stability. For the realization of flexible displays, all processes should be performed at very low temperatures, but low temperature $Al_2O_3$ grown by sputtering showed deteriorated electrical performance. Further decrease in growth temperature induces a high density of charge traps in the gate oxide/channel. This study investigated the effect of growth temperatures of ALD grown $Al_2O_3$ layers on the TFT device performance. The ALD deposition showed high conformal and defect-free dielectric layers at low temperature compared with other deposition equipments [2]. After ITO was wet-chemically etched with HCl : $HNO_3$ = 3:1, $Al_2O_3$ layer was deposited by ALD at various growth temperatures or lift-off process. Amorphous InGaZnO channel layers were deposited by rf magnetron sputtering at a working pressure of 3 mTorr and $O_2$/Ar (1/29 sccm). The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. The TFT devices were heat-treated in a furnace at $300^{\circ}C$ and nitrogen atmosphere for 1 hour by rapid thermal treatment. The electrical properties of the oxide TFTs were measured using semiconductor parameter analyzer (4145B), and LCR meter.

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Physical Vapor Deposition공정 시, Substrate 온도에 따른 X-선 검출용 비정질 셀레늄의 성능평가

  • 김대국;강진호;김진선;노성진;조규석;신정욱;남상희
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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    • pp.210.2-210.2
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    • 2013
  • 현재 국내의 상용화된 디지털 방식 X-선 영상장치에서 간접변환방식은 대부분 CsI를 사용하고 있으며, X-선 흡수에 의해 전기적 신호를 발생시키는 직접변환방식은 Amorphous Selenium(a-Se)을 사용한다. a-Se은 진공 중에 녹는점이 낮아 증착시 substrate의 온도에 따라 민감한 변화를 보인다. 본 연구에서는 간접변환방식에 비해 높은 영상의 질을 획득할 수 있는 직접변환방식의 a-Se기반 X-선 검출기 제작 시 substrate에 인가된 온도에 따른 특성을 연구하여 최적화 된 substrate의 온도를 알고자 한다. 본 실험에서는 glass에 투명한 전극물질인 Indium Tin Oxide (ITO)가 electrode로 형성된 substrate를 사용하였으며 그 상단에 a-Se을 Physical Vapor Deposition (PVD)방식을 거쳐 X-선 검출기 샘플을 제작하였다. PVD 공정 시 네 개의 보트에 a-Se 시료를 각각 100g씩 총 400g을 넣고, $5{\times}10-5Torr$까지 진공도를 낮추었다. 보트의 온도는 $270^{\circ}C$에서 40분 $290^{\circ}C$에서 90분으로 온도를 인가하여 a-Se을 기화시켜 증착하였다. 증착 시 substrate 온도를 각각 $20^{\circ}C$, $40^{\circ}C$, $60^{\circ}C$, $70^{\circ}C$ 네 종류로 나누어 실험을 진행하였다. 끝으로 증착된 a-Se 상단에 Au를 PVD방식으로 electrode를 형성시켜 a-Se기반의 X-선 검출기 샘플 제작을 완료하였다. 제작된 a-Se기반의 X-선 검출기 샘플의 두께는 80에서 $85{\mu}m$로 온도에 따른 차이가 없었다. 이후에 전기적 특성을 평가하기위해 electrometer와 oscilloscope를 이용하여 Dark current와 Sensitivity를 측정하여 Signal to Noise Ratio(SNR)로 도출하였으며 Scanning Electron Microscope(SEM) 표면 uniformity를 관찰하였다. 또한 제작된 a-Se기반 X-선 검출기 샘플의 hole collection 성능을 확인하고자 mobility를 측정하였다. 측정결과 a-Se의 work function을 고려한 $10V/{\mu}m$기준에서 70kV, 100mA, 0.03sec의 조건의 X-선을 조사 하였을 때 Sensitivity는 세 종류의 검출기 샘플이 15nC/mR-cm2에서 18nC/mR-cm2으로 비슷한 양상을 나타내었지만, substrate온도가 $70^{\circ}C$때의 샘플은 10nC/mR-cm2이하로 저감됨을 알 수 있었다. 그리고 substrate온도 $60^{\circ}C$에서 제작된 검출기 샘플의 전기적 특성이 SNR로 환산 시, 15.812로 가장 우수한 전기적 특성을 나타내어 최적화 된 온도임을 알 수 있었다. SEM촬영 시 온도상승에 따라 표면 uniformity가 우수하였으며, Mobility lifetime에서는 $60^{\circ}C$에서 제작된 검출기 샘플이 deep trap 수치가 높아 hole이 $0.04584cm2/V{\cdot}sec$$0.00174cm2/V{\cdot}sec$의 electron보다 26.34배가량 빠른 것을 확인하였다. 본 연구를 통해 a-Se증착 시, substrate에 인가된 온도는 균일한 박막의 형성 및 표면구조에 영향을 미치며 온도가 증가할수록 안정적인 전기적 특성을 나타내지만 $70^{\circ}C$이상일 시, a-Se층의 결정화가 생겨 deep trap을 발생시켜 전기적 특성이 저하됨을 확인 할 수 있었다. 따라서 증착 시의 substrate의 온도 최적화는 a-Se기반 X-선 검출기의 안전성 및 성능향상을 위해 불가피한 요소가 된다고 사료된다.

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Dependency of the emission efficiency on doping profile of the red phosphorescent organic light-emitting diodes

  • 박원혁
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.224-224
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    • 2016
  • Many researchers have been tried to improve the performance of the phosphorescent organic light-emitting diode(PHOLED) by controlling of the dopant profile in the emission layer. In this work, as shown in Fig. 1 insert, a typical red PHOLED device which has the structure of ITO/NPB(50nm)/CBP(30nm)/TPBi(10nm)/Alq3(20nm)/LiF(0.8nm)/Al(100nm) is fabricated with a 5nm thick doping section in the emission layer. The doping section is formed by co-deposition of CBP and Ir(btp)2acac with a doping concentration of 8%, and it's location(x) is changed from HTL/EML interface to EML/HBL in 5nm steps. The current efficiency versus current density of the devices are shown in Fig. 1. By changing the location of doping section, as shown in Fig. 1 and 2, at x=5nm, the efficiency shows the maximum of 3.1 cd/A at 0.5 mA/cm2 and it is slightly decreased when the section is closed to HTL and slightly increased when the section is closed to HBL. If the doping section is closed to HTL(NPB) the excitons can be quenched easily to NPB's triplet state energy level(2.5eV) which is relatively lower than that of CBP(2.6eV). Because there is a hole accumulation at EML/HBL interface the efficiency can be increased slightly when the section is closed to HBL. Even the thickness of the doping section is only 5nm,. the maximum efficiency of 3.1 cd/A with x=5 is closed to that of the homogeneously doped device, 3.3 cd/A, because the diffusion length of the excitons is relatively long. As a result, we confirm that the current efficiency of the PHOLED can be improved by the doping profile optimization such as partially, not homogeneously, doped EML structure.

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일함수 변화를 통한 그래핀 전극의 배리어 튜닝하기 (Study of the Carrier Injection Barrier by Tuning Graphene Electrode Work Function for Organic Light Emitting Diodes OLED)

  • 김지훈;맹민재;홍종암;황주현;최홍규;문제현;이정익;정대율;최성율;박용섭
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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    • pp.111.2-111.2
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    • 2015
  • Typical electrodes (metal or indium tin oxide (ITO)), which were used in conventional organic light emitting devices (OLEDs) structure, have transparency and conductivity, but, it is not suitable as the electrode of the flexible OLEDs (f-OLEDs) due to its brittle property. Although Graphene is the most well-known alternative material for conventional electrode because of present electrode properties as well as flexibility, its carrier injection barrier is comparatively high to use as electrode. In this work, we performed plasma treatment on the graphene surface and alkali metal doping in the organic materials to study for its possibility as anode and cathode, respectively. By using Ultraviolet Photoemission Spectroscopy (UPS), we investigated the interfaces of modified graphene. The plasma treatment is generated by various gas types such as O2 and Ar, to increase the work function of the graphene film. Also, for co-deposition of organic film to do alkali metal doping, we used three different organic materials which are BMPYPB (1,3-Bis(3,5-di-pyrid-3-yl-phenyl)benzene), TMPYPB (1,3,5-Tri[(3-pyridyl)-phen-3-yl]benzene), and 3TPYMB (Tris(2,4,6-trimethyl-3-(pyridin-3-yl)phenyl)borane)). They are well known for ETL materials in OLEDs. From these results, we found that graphene work function can be tuned to overcome the weakness of graphene induced carrier injection barrier, when the interface was treated with plasma (alkali metal) through the value of hole (electron) injection barrier is reduced about 1 eV.

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TCO 응용을 위한 패턴된 기판위에 증착된 AZO 박막의 특성 연구 (Conformal coating of Al-doped ZnO thin film on micro-column patterned substrate for TCO)

  • 최미경;안철현;공보현;조형균
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.28-28
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    • 2009
  • Fabrications of antireflection structures on solar cell were investigated to trap the light and to improve quantum efficiency. Introductions of patterned substrate or textured layer for Si solar cell were performed to prevent reflectance and to increase the path length of incoming light. However, it is difficult to deposit conformally flat electrode on perpendicular plane. ZnO is II-VI compound semiconductor and well-known wide band-gap material. It has similar electrical and optical properties as ITO, but it is nontoxic and stable. In this study, Al-doped ZnO thin films are deposited as transparent electrode by atomic layer deposition method to coat on Si substrate with micro-scale structures. The deposited AZO layer is flatted on horizontal plane as well as perpendicular one with conformal 200 nm thickness. The carrier concentration, mobility and resistivity of deposited AZO thin film on glass substrate were measured $1.4\times10^{20}cm^{-3}$, $93.3cm^2/Vs$, $4.732\times10^{-4}{\Omega}cm$ with high transmittance over 80%. The AZO films were coated with polyimide and performed selective polyimide stripping on head of column by reactive ion etching to measure resistance along columns surface. Current between the micro-columns flows onto the perpendicular plane of deposited AZO film with low resistance.

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Structural, Electrical and Optical Properties of $HfO_2$ Films for Gate Dielectric Material of TTFTs

  • 이원용;김지홍;노지형;문병무;구상모
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.331-331
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    • 2009
  • Hafnium oxide ($HfO_2$) attracted by one of the potential candidates for the replacement of si-based oxides. For applications of the high-k gate dielectric material, high thermodynamic stability and low interface-trap density are required. Furthermore, the amorphous film structure would be more effective to reduce the leakage current. To search the gate oxide materials, metal-insulator-metal (MIM) capacitors was fabricated by pulsed laser deposition (PLD) on indium tin oxide (ITO) coated glass with different oxygen pressures (30 and 50 mTorr) at room temperature, and they were deposited by Au/Ti metal as the top electrode patterned by conventional photolithography with an area of $3.14\times10^{-4}\;cm^2$. The results of XRD patterns indicate that all films have amorphous phase. Field emission scanning electron microscopy (FE-SEM) images show that the thickness of the $HfO_2$ films is typical 50 nm, and the grain size of the $HfO_2$ films increases as the oxygen pressure increases. The capacitance and leakage current of films were measured by a Agilent 4284A LCR meter and Keithley 4200 semiconductor parameter analyzer, respectively. Capacitance-voltage characteristics show that the capacitance at 1 MHz are 150 and 58 nF, and leakage current density of films indicate $7.8\times10^{-4}$ and $1.6\times10^{-3}\;A/cm^2$ grown at 30 and 50 mTorr, respectively. The optical properties of the $HfO_2$ films were demonstrated by UV-VIS spectrophotometer (Scinco, S-3100) having the wavelength from 190 to 900 nm. Because films show high transmittance (around 85 %), they are suitable as transparent devices.

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유연기판위에 상분리를 이용한 반도체 나노입자 증착 (Deposition of Nanocrystals using Phase Separation on Flexible Substrates)

  • 오승균;정국채;김영국;최철진
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.284-284
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    • 2009
  • We have fabricated semiconductor nanocrystals using phase separation on flexible substrates for future application in QD-LEDs. The phase separation between the CdSe semiconductor nanocrystals and TPD organic underlayer can occur during the solvent drying, and the CdSe may rise towards the surface of the coated films, which is arranged into close packed array called self-assembly process. In this work, the polyethylene naphthalate (PEN) films of $200{\mu}m$ thickness was used as a flexible substrate, which was coated with indium tin oxide(ITO) as a transparent electrode of <$15{\Omega}/cm^2$. A number of solvents such as chloroform, toluene, and hexane was used and their coating properties were investigated using the spin coating process. The dispersion of both QD and TPD was rather poor in toluene and hexane and resulted in rougher surface and some aggregates. Meanwhile, the surface roughness of templates can be a very critical issue in the fabrication of QD-LED devices. Some experiments was performed to reduce the ~4nm surface roughness of the PEN films and It can be decreased to the minimum of ~0.7nm. Also discussed are the optical properties of semiconductor nanocrystals used in this phase separation and possible large area and continuous coating process for future application.

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