• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.981-985
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• 2004

In this paper we designed the motor control IP Core and evaluate its quality from the viewpoint of IP reuse. The most attractive merit of this methodology, so called IP-based hardware design, is hardware reuse. Although various vendors designed hardware with the same specification and got the same functional results, all that IPs is not the same quality in the reuse aspect. As tremendous calls for SoC have been increased, associated research about IP quality standard, VSIA(Virtual Socket Interface Alliance) and STARC(Semiconductor Technology Academic Research Center), has been doing best to make the IP quality evaluation system. And they made what conforms to objective IP design standard. We suggest the methodology to evaluate our own designed motor control IP quality with this standard. To attain our goal, we designed motor control IP that could control the motor velocity and position with feedback compensation algorithm. This controller has some IP blocks : digital filter, quadrature decoder, position counter, motion compensator, and PWM generator. Each block's functionality was verified by simulator ModelSim and then its quality was evaluated. To evaluate the core, We use Vnavigator for lint test and ModelSim for coverage check. During lint process, We adapted the OpenMORE's rule based on RMM (Reuse Methodology Manual) and it could tell us our IP's quality in a manner of the scored value form. If it is high, its quality is also high, and vice versa. During coverage check ModelSim-SE is used for verifying how our test circuits cover designs. This objective methods using well-defined commercial coverage metrics could perform a quantitative analysis of simulation completeness. In this manner, We evaluated the designed motor control IP's quality from the viewpoint of reuse. This methodology will save the time and cost in designing SoC that should integrate various IPs. In addition to this, It can be the guide for comparing the equally specified IP's quality. After all, we are continuously looking forward to enhancing our motor control IP in the aspect of not only functional perfection but also IP reuse to prepare for the SoC-Compliant motor control IP design.

• Management Science and Financial Engineering
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• v.3 no.2
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• pp.71-92
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• 1997

Developing FMS controllers has been a difficult problem largely because of the variety of the system configuration. The purpose of this paper is to develop a method of building an FMS controller. The controller consists of control module and execution module. A hierarchically layered structure of these modules is proposed. The control module generates abstract-level execution requested by identifying a set of activities that can be executed without creating any irregular state. The execution module transmits the requests to physical device controllers and reports back the completion of the requests to the control module. Both of these two modules use Petri Net-based models. In this paper, a controllable Petri Net model is automatically synthesized from declarative specifications provided by a user. An execution Petri Net model for the execution module is designed to ensure the consistency between the control module and the real target system. The controller operates in MMS on TCP/IP and UNIX environment.

• Proceedings of the KIEE Conference
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• 1999.11c
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• pp.488-490
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• 1999

This paper describes the design of self-tuning speed controller for DC motor drive system using RLS(Recursive Least Squares) algorithm and Pole-Placement method. The model parameters, related to inertia and damping coefficient of motor, are estimated on-line by using RLS estimation algorithm. And a control signal is calculated by using pole placement method. Simulation and experimental results show that the proposed controller possesses excellent adaptation capability than a conventional PI/IP controller under parameter change.

• Proceedings of the KIEE Conference
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• 1999.11c
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• pp.649-651
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• 1999

This paper presents SNMP remote management system for power plants using micro-controller. Control board supporting LAN-based remote monitor and control is produced and MMI program on PC is also constructed. To expand into Internet, SNMP(Simple Network Management Protocol), the standard network management protocol of TCP/IP protocol suite, is ported to this control board consisted of micro-controller, 80c196KC, and LAN controller, Am7990DC. To overcome the constraints of CPU performance and memory capacity, TCP/P protocol suite is simplified and informations needed to management were implemented in accordance with MIB(Management Information Base) specified in RFC. Also monitoring software is constructed by Visual Basic.

• Journal of Communications and Networks
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• v.6 no.2
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• pp.133-146
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• 2004

Recently, many active queue management (AQM) algorithms have been proposed to address the performance degradation. of end-to-end congestion control under tail-drop (TD) queue management at Internet routers. However, these AQM algorithms show performance improvement only for limited network environments, and are insensitive to dynamically changing network situations. In this paper, we propose an adaptive queue management algorithm, called PID-controller, that uses proportional-integral-derivative (PID) feedback control to remedy these weak-Dalles of existing AQM proposals. The PID-controller is able to detect and control congestion adaptively and proactively to dynamically changing network environments using incipient as well as current congestion indications. A simulation study over a wide range of IP traffic conditions shows that PID-controller outperforms other AQM algorithms such as Random Early Detection (RED) [3] and Proportional-Integral (PI) controller [9] in terms of queue length dynamics, packet loss rates, and link utilization.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.113-118
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• 2005

Softswitch is the core BcN equipment which voice and multimedia switching based on the IP Technologies. It is designed to replace the Class 5(local Exchange) and Class 4(Toll Exchange) switch based on the circuit wired and wireless switching network technologies. Softswitch gets its name because typically it is a software based solution implemented on general purpose computers/servers. While the traditional PSTN switches are rely on dedicated facilities for T and S inter-connection and are designed primarily for voice communications. Packet based Softswitch is divided the control of call and bearer, very different from Public telephone network. Sometimes Call Agent or Media Gateway Controller, a key component in the VoIP solution, is also called Softswitch. This paper will suggest the software architecture of softswitch for performance in call processing part, also suggest the session management model to cover call setup latency.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.1836-1839
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• 2005

We have developed Ethernet based real-time communication systems called "Vnet/IP" for DCS which is the control system for process automation. This paper describes the features and the technologies of the ASIC which is utilized in the communication interface hardware for Vnet/IP. Vnet/IP has been developed for mission-critical communications. Hence it has real-time feature, high reliability and precise time synchronization capability. At the same time, it is able to deal with standard protocols without influence on mission-critical communications. The communication interface hardware has a host interface and dual redundant network interfaces. The host interface can be chosen PCI-bus or R-bus which is the proprietary internal bus developed for the high reliable redundant controller. Each network interface is a RJ45 connection with 1Gbps maximum in compliance with IEEE802.3.

• Proceedings of the KIEE Conference
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• 2000.07d
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• pp.3013-3015
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• 2000

The stabilization control of Inverted Pendulum(IP) system is difficult because of its nonlinearity and structural unstability. Futhermore, a series of conventional techniques such as the pole placement and the optimal control based on the local linearizations have narrow stabilizable regions, At the same time, the fine tunings of their gain parameters are also troublesome, Thus, in this paper, an Evolving Neural Network ControlleY(ENNC) which its structure and its connection weights are optimized simultaneously by Real Variable Elitist Genetic Algorithm (RVEGA) was presented for stabilization of an IP system with nonlinearity, This proposed ENNC was described by a simple genetic chromosome. Through the simulation and experimental results, we showed that the finally acquired optimal ENNC was very useful in the stabilization control of IP system.

• Journal of Electrical Engineering and Technology
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• v.9 no.5
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• pp.1489-1494
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• 2014

A hardware-in-the-loop simulation (HILS) method for a wind farm controller using a real time digital simulator (RTDS) is presented, and performance of the wind farm controller is analyzed. A 100 MW wind farm which includes 5 MW wind power generation systems (WPGS) is modeled and analyzed in RSCAD/RTDS. The wind farm controller is implemented by using a computer, which is connected to the RTDS through transmission control protocol/internet protocol (TCP/IP). The HILS results show the active power and power factor of the wind farm, which are controlled by the wind farm controller. The proposed HILS method in this paper can be effectively utilized to validate and test a wind farm controller under the environment in practice without a real wind farm.

• International Journal of Aeronautical and Space Sciences
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• v.18 no.4
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• pp.675-687
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• 2017

In the aerospace industry, we have produced various models according to operational conditions and the environment after development of the base model is completed. Therefore, when design change is necessary, there are modification and updating costs of the circuit whenever environment variables change. For these reasons, recently, in various fields, system designs that can flexibly respond to changing environmental conditions using field programmable gate arrays (FPGAs) are attracting attention, and the rapidly changing aerospace industry also uses FPGAs to organize the system environment. In this paper, we design the controller area network (CAN) intellectual property (IP) protocol used instead of the avionics protocol that includes ARINC-429 and MIL-STD-1553, which are not suitable for small unmanned aerial vehicle (UAV) systems at the register transistor logic (RTL) level, which does not depend on the FPGA vender, and we verify the performance. Consequentially, a Spartan 6 FPGA model-based system on chip (SoC) including an embedded system is constructed by using the designed CAN communications IP and Xilinx Microblaze, and the configured SoC only recorded an average 32% logic element usage rate in the Spartan 6 FPGA model.