• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.6
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• pp.1040-1047
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• 2015

This study is investigated for M2M Communication Network Standard based on 3GPP. The environment of M2M communication, we can predict the new mobile service that gathering, handling, controlling, transferring of the data for Intelligence, so that we can consider new direction for a lot of subject of study development issue. This study is shown three types of M2M network structure and four types of use cases on 3GPP International Standard. In Addition, we can introduce the future M2M communication network model, it can be propagate the industry and academic cooperation with 3GPP standards. The suggestion develops multiple applications and multiple devices for industry and academic. With the deployment of network provider, this environment support our current communication market that the standard devices of M2M network and service requirement. We are suggest this study for grasp the initial market with the intellectual property right (IPR) based on International Standards. In the future, we wish the success that grap the initial market or initial academic study with helpful issue.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.10
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• pp.712-720
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• 2001

Algorithms from the research of the layout migration were proposed in the paper. These are automatic recognition algorithm for the VLSI devices from it, graph based construction algorithm to maintain the constraints, dependencies, and design rule between the devices, and high speed compaction algorithm to reduce size of the VLSI area and reuse the design with compacted size for the new technology. Also, this paper describes that why proposed algorithms are essential for the era of the SoC (System on a Chip), design reuse, and IP DB, which are the big concerns in these days. In addition to introduce our algorithms, the benchmark showed that our performance is superior by 27 times faster than that of the commercial one, and has better efficiency by 3 times in disk usage.

• The Journal of the Acoustical Society of Korea
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• v.24 no.1
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• pp.11-20
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• 2005

In this paper, we deal with the research about a S/PDIF (Sony Philips Digital Interface) receiver which can operate without PLL (Phase Locked Loop) circuits. Although a S/PDIF receiver is used in most audio devices and audio processors in these days. yet there are only few domestic researches about S/PDIF. Currently used commercial DACs (Digital-to-Analog Converters) which can decode S/PDIF signals, have a PLL circuit inside them. The PLL makes it possible to extract clock information from S/PDIF digital signal and to synchronize a clock signal with input signals. But the PLL circuit makes many diffculties in designing the SOC (System On Chips) of VLSIs (Vew Large Scale Integrated Ciruits) because it is an "analog circuit". We proposed a S/PDIF receiver which doesn't have PLL circuits and only has Pure digital circuits. The key idea of the proposed S/PDIF receiver. is to use the ratio between a 16 MHz basic input clock and S/PDIF signals. After having decoded hundreds thousands S/PDIF inputs, it went to prove that a S/PDIF receiver can be designed with pure digital circuits and without any analog circuits such as PLL circuits. We have confidence that the proposed S/PDIF receiver can be used as an IP (Intellectual Property) for the SOC design of the digital circuits.