• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.8
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• pp.764-768
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• 2002

In this paper, a double balanced gilbert cell MMIC mixer was realized in Tachyonics SiGe HBT technology. The fabricated mixer has 17 dB conversion gain, 9.8 dB noise figure, -4.2 dBm output 1 dB compression point, -27 dBc RF to IF isolation, and the good input, output matching characteristics. It draws 10 mA from a 3 V supply. The simulation and the measured results are closer to each other, which confirms accuracy of the model library and reliability of the process.

• ETRI Journal
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• v.27 no.5
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• pp.569-578
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• 2005

The purpose of this paper is to describe the implementation of monolithically matching circuits, interface circuits, and RF core circuits to the same substrate. We designed and fabricated on-chip 1 to 6 GHz up-conversion and 1 to 8 GHz down-conversion mixers using a 0.8 mm SiGe hetero-junction bipolar transistor (HBT) process technology. To fabricate a SiGe HBT, we used a reduced pressure chemical vapor deposition (RPCVD) system to grow a base epitaxial layer, and we adopted local oxidation of silicon (LOCOS) isolation to separate the device terminals. An up-conversion mixer was implemented on-chip using an intermediate frequency (IF) matching circuit, local oscillator (LO)/radio frequency (RF) wideband matching circuits, LO/IF input balun circuits, and an RF output balun circuit. The measured results of the fabricated up-conversion mixer show a positive power conversion gain from 1 to 6 GHz and a bandwidth of about 4.5 GHz. Also, the down-conversion mixer was implemented on-chip using LO/RF wideband matching circuits, LO/RF input balun circuits, and an IF output balun circuit. The measured results of the fabricated down-conversion mixer show a positive power conversion gain from 1 to 8 GHz and a bandwidth of about 4.5 GHz.

• Journal of electromagnetic engineering and science
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• v.2 no.1
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• pp.56-58
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• 2002

In this paper, the double conversion gate mixer using a half-LO frequency is described at 25 GHz band. The proposed mixer uses two HEMTs excited by a single LO signal of half-LO frequency in order to generate the second IF signal. That is, the LO signal having the half-LO frequency is only fed into the gate of the first HEMT mixer as a normal gate mixer. The LO signal through the first mixer is find into the second mixer The proposed miler requires not only half of the normal LO frequency, but also lower LO power than the conventional subharmonically pumped milers. Over the bandwidth of 500 MHz at 24.5 GHz, the conversion gain is 2.5 dB, the noise figure is 9 dB, and the isolation between RF and LO port is 32 dB when the LO poller is 0 dBm at 12.65 GHz.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.104-107
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• 2000

We designed and implemented the RFIC(RF front-end IC) for DTV(Digital TV) tuner. The DTV tuner RF front-end consists of low noise IF amplifier fur the amplification of 900 MHz RF signal and down conversion mixer for the RF signal to 44MHz IF conversion. The RFIC is implemented on ETRI 0.8u high resistive (2㎘ -cm) and evaluated by on wafer, packaged chip test. The gain and IIP3 of IF amplifier are 15㏈ and -6.6㏈m respectively. For the down conversion mixer gain and IIP3 are 13㏈ and -6.5㏈m. Operating voltage of the IF amplifier and the down mixer is 5V, current consumption are 13㎃ and 26㎃ respectively.

• Proceedings of the KIEE Conference
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• 2003.11c
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• pp.894-897
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• 2003

Recently, the rapid growth of mobile radio system has led to an increasing demand of low-cost high performance communication IC's. In this paper, we have designed RF front end for wireless LAN receiver employ zero-IF architecture. A low-noise amplifier (LNA) and double-balanced mixer is included in a front end. The zero-IF architecture is easy to integrate and good for low power consumption, so that is coincided to requirement of wireless LAN. But the zero-IF architecture has a serious problem of large offset. Image-reject mixer is a good structure to solve offset problem. Using offset compensation circuit is good structure, too. The front end is implemented in 0.25 ${\mu}m$ CMOS technology. The front end has a noise figure of 5.6 dB, a power consumption of 16 mW and total gain of 22 dB.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.6
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• pp.835-840
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• 1993

In this paper a FET mixer is designed realized by small-signal S-parameter using microwave CAD, LINMIC + at Ku-band. The mixer has conversion gain 9.88dB at 14GHz RF, 1GHz IF, and + 1dBm LO imput. The maximum conversion gain is obtained 11.71dB at 1.1GHz. The result shows that the FET mixer does not need pre-and/or IF amplifier. The mixer maintains the desired conversion gain with low LO power level. The conversion gain of the mixer is higher than the available gain of a amplifier, which is experimentally verified.

• The Journal of the Korea institute of electronic communication sciences
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• v.13 no.4
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• pp.685-694
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• 2018

In this paper, we designed and fabricated the frequency mixer, which is the core parts of high frequency head in Ku-band tracking radar. To overcome the problem of single-ended and single-balanced resistive structure, we designed the fine-line structure with balanced mixer, to generate IF signal without distortion in L-band, after receiving the RF signal of the Ku-band. The prototype mixer showed a Noise Figure Max of 6.823dB, Gain of 4.1598~4.676dB and Band Pass of 61MHz in 5 Ku-band samples frequency.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.7
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• pp.293-299
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• 2003

In this paper, we have proposed a high conversion and isolation characteristic V-band quadruple sub-harmonic mixer monolithic circuit which is designed and fabricated for the millimeter wave down converter applications. While most of the sub-harmonic mixers use a half of fundamental frequency, we adopt a quarter of the fundamental frequency. The proposed circuit is based on a sub-harmonic mixer with APDP(anti-parallel diode pair) and the 0.1 ${\mu}{\textrm}{m}$ PHEMT's (pseudomorphic high electron mobility transistors). Lumped elements at IF port provide better selectivity of IF frequency and increase isolation. Maximum conversion gain of 0.8 ㏈ at a LO frequency of 14.5㎓ and at a RF frequency of 60.4 ㎓ is measured. Both LO-to-RF and LO-to-IF isolations are higher than 50 ㏈. The conversion gain and isolation characteristic are the best performances among the reported quadruple sub-harmonic mixer operating in the V-band millimeter wave frequency thus far.

• Journal of IKEEE
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• v.8 no.1 s.14
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• pp.73-78
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• 2004

In this paper, it is designed for 5.8GHz Wireless LAN sub harmonic resistive mixer. Sub harmonic resistive mixer is constituted by advantage of sub harmonic mixer and resistive mixer. Sub harmonic resistive mixers mix harmonics of LO with RF and obtain IF frequency. Therefore, it was possible to use decreasing LO frequency than conventional mixers. And, Sub harmonic resistive mixer has low IMD because of using unbiased channel resistance of GaAs FET. When LO power is 13dBm, the conversion loss of manufactured sub harmonic resistive mixer is 10.67 dB. And IIP3 of mixer is 21.5dBm.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.426-429
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• 1988

A simple design method of a single balanced MMIC mixer is described. It uses small signal S11 and capacitive load for the input matching circuit and the output loading circuit, respectively. It is found that the conversion gain of the FET mixer is independent of FET gate width. The fabricated mixer has 2.5 dB conversion gain at 9 GHz with 50 ohm IF load and 2 dBm local oscillator power.