• Title/Summary/Keyword: IEEE-Standard

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Power Monitoring System with Multiple Input Channels Using the Definition of IEEE Standard 1459-2010 (IEEE 1459-2010 규격의 정의를 이용한 다중 입력 채널을 갖는 전력 감시 시스템)

  • Jeon, Jeong-Chay;Oh, Hun
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.5
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    • pp.3100-3106
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    • 2014
  • This paper develops power measurement system with multiple sensor input channels (voltage-8 channels and current-10 channels) that simultaneously can monitor power components for both supply and load side of power system. The hardware implementation of the proposed system is based on TMS320C42 DSP and signal processing program algorithm to calculate power components use the definition of IEEE Standard 1459-2010 related power quality. The performance of the developed system is tested by using standard ac power source device, and the test results showed that accuracy of the developed system is less than 0.2 %. Also, field test of the proposed system in the three-phase and four-wire power system was implemented. Simultaneous multiple channel measurement and analysis of power components in commercial and industrial electrical power system using the proposed system will be necessary to reduce power quality problems.

Downlink-First Scheduling of Real-Time Voice Traffic in IEEE 802.11 Wireless LANs (무선랜 시스템에서의 하향 우선 실시간 음성 트래픽 스케줄링)

  • Jeong, Dong W.;Lee, Chae Y.
    • Journal of Korean Institute of Industrial Engineers
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    • v.29 no.2
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    • pp.150-156
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    • 2003
  • The IEEE 802.11 MAC (Media Access Control) Protocol supports two modes of operation, a random access mode for nonreal-time data applications processed by Distributed Coordinated Function (DCF), and a polling mode for real-time applications served by Point Coordinated Function (PCF). It is known that the standard IEEE 802.11 is insufficient to serve real-time traffic. To provide Quality of Service (QoS) of real-time traffic, we propose the Downlink-first scheduling with Earliest Due Date (EDD) in Contention Free Period (CFP) with suitable admission control. The capacity and deadline violation probability of the proposed system is analyzed and compared to the standard pair system of downlink and uplink. Analytical and simulation results show that the proposed scheme is remarkably efficient in view of the deadline violation probability.

Power control in Ad Hoc network using ZigBee/IEEE802.15.4 Standard (ZigBee/IEEE802.15.4 표준을 사용하는 Ad Hoc 네트워크 상의 전력 통제)

  • Kirubakaran K.;Lee Jae-Kwang
    • Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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    • 2006.06a
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    • pp.219-222
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    • 2006
  • In this paper an intrusion detection system technique of wireless Ad Hoc network is explained and the advantage of making them work in IEEE 802.15.4/ZigBee wireless standard is also discussed. The methodology that is mentioned here is intrusion detection architecture based on a local intrusion database [1]. An ad hoc network is a collection of nodes that is connected through a wireless medium forming rapidly changing topologies. Due to increased connectivity (especially on the Internet), and the vast spectrum of financial possibilities that are opening up, more and more systems are subject to attack by intruders. An ideal IDS should able to detect an anomaly caused by the intruders quickly so that the misbehaving node/nodes can be identified and appropriate actions (e.g. punish or avoid misbehaving nodes) can be taken so that further damage to the network is minimized

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IEEE Standard Floating Poing ALU with 60MHz Clock Frequency (60MHz Clock 주파수의 IEEE 표준 Floating Point ALU)

  • Yong Surk Lee
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.28A no.11
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    • pp.915-922
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    • 1991
  • This research paper presents an ALU unit using 1.0$\mu$m CMOS technology capable of doing IEEE standard single and double precision floating poing calculation within 32ns (2 clock) at 60 MHz clock speed. This 32ns speed was achieved by using 9ns 1's complement arithmetic 54 bit carry select adder instead of previous 2's complement adders. On the first cycle, this adder is used for addition or subtraction and the second cycle uses this adder for rounding. This reduces the number of required adders from two to one. Speed improvement is 2 to 5 times compared with previous 40MHz design. Design goal was 60MHz, however, this unit is functioning at 80 MHz at room temperature.

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IEEE-754 Floating-Point Divider for Embedded Processors (내장형 프로세서를 위한 IEEE-754 고성능 부동소수점 나눗셈기의 설계)

  • 정재원;홍인표;정우경;이용석
    • Proceedings of the IEEK Conference
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    • 2000.11b
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    • pp.353-356
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    • 2000
  • In this paper, a high-performance and small-area floating-point divider, which is suitable for embedded processors and supports all rounding modes defined by IEEE 754 standard, is designed using the series expansion algorithm. This divider shares and fully utilizes the two MAC units for quadratical convergence to the correct quotient. The area increase of two MAC units due to the division is minimized in this design, so that it can be suitable for embedded processors. The tested HDL codes are synthesized and optimized with 0.35$\mu\textrm{m}$ CMOS standard celt libraries. The results show that the latency of the synthesized divider is 17.43 ㎱ in worst condition. But, the divider calculates the correct rounded quotient through only 6 cycles.

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Analytical Coexistence Benchmark for Assessing the Utmost Interference Tolerated by IEEE 802.20

  • Abdulla, Mouhamed;Shayan, Yousef R.
    • Journal of Information Processing Systems
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    • v.7 no.1
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    • pp.43-52
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    • 2011
  • Whether it is crosstalk, harmonics, or in-band operation of wireless technologies, interference between a reference system and a host of offenders is virtually unavoidable. In past contributions, a benchmark has been established and considered for coexistence analysis with a number of technologies including FWA, UMTS, and WiMAX. However, the previously presented model does not take into account the mobility factor of the reference node in addition to a number of interdependent requirements regarding the link direction, channel state, data rate and system factors; hence limiting its applicability for the MBWA (IEEE 802.20) standard. Thus, over diverse modes, in this correspondence we analytically derived the greatest aggregate interference level tolerated for high-fidelity transmission tailored specifically for the MBWA standard. Our results, in the form of benchmark indicators, should be of particular interest to peers analyzing and researching RF coexistence scenarios with this new protocol.

Development of wireless wind chill temperature measurement system (무선 체감온도 측정 시스템 개발)

  • Kim, Hyung-Pyo;Kim, Jin-Gyu;Sohn, Kyung-Rak
    • Journal of Sensor Science and Technology
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    • v.18 no.3
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    • pp.245-250
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    • 2009
  • The paper presents the wireless wind chill temperature measurement system that is composed of IEEE 802.15.4 standard wireless communication devices, hot film anemometer and serial communication temperature sensor. It's sometimes very difficult for a person, who lives in a high-rise apartment, to see the outside wind chill temperature due to harsh outside weather. The wind chill temperature is calibrated from an air velocity and air temperature. IEEE 802.15.4 standard wireless communication is ZigBee compatible, and consumes low power in communication. Under the air temperature of 5 $^{\circ}C$ and air velocity ranging from 0 to 50 km/h, the experimental result of wind chill temperature shows good accuracy within 5%.

A Design of Multi-Standard LDPC Decoder for WiMAX/WLAN (WiMAX/WLAN용 다중표준 LDPC 복호기 설계)

  • Seo, Jin-Ho;Park, Hae-Won;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.2
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    • pp.363-371
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    • 2013
  • This paper describes a multi-standard LDPC decoder which supports 19 block lengths(576~2304) and 6 code rates(1/2, 2/3A, 2/3B, 3/4A, 3/4B, 5/6) of IEEE 802.16e mobile WiMAX standard and 3 block lengths(648, 1296, 1944) and 4 code rates(1/2, 2/3, 3/4, 5/6) of IEEE 802.11n WLAN standard. To minimize hardware complexity, it adopts a block-serial (partially parallel) architecture based on the layered decoding scheme. A DFU(decoding function unit) based on sign-magnitude arithmetic is used for hardware reduction. The designed LDPC decoder is verified by FPGA implementation, and synthesized with a 0.13-${\mu}m$ CMOS cell library. It has 312,000 gates and 70,000 bits RAM. The estimated throughput is about 79~210 Mbps at 100 MHz@1.8v.

A Study on the Behavior of Floating-Point Unit Conforming the ANSI/IEEE Std. 754-1985 (ANSI/IEEE Std. 754-1985에 의거한 부동소수점 연산기의 동작원리에 관한 연구)

  • Kim, Kwang-Uk;Chung, Tae-Sang
    • Proceedings of the KIEE Conference
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    • 1999.11c
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    • pp.788-790
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    • 1999
  • A software implementation of floating-point addition and multiplication is presented. For this, the ANSI/IEEE standard for binary floating-point arithmetic is reviewed briefly. The architecture and behavior of the $Intel^{(R)}\;80{\times}87$ FPU is fully studied and basic algorithms for floating-point addition and multiplication are used for the implementation. Some examples and their verifications are also presented.

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Comparison of Architectures Supporting Emergency Services for VOIP Services

  • Lee, Kye-Sang
    • Journal of information and communication convergence engineering
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    • v.8 no.5
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    • pp.508-512
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    • 2010
  • Supporting emergency services (ES) for VOIP services in the Internet is a critical feature. It requires international standards since the VOIP services over the Internet has no national boundaries. Recently, standard development organizations such as the IETF, the IEEE 802 committee and the WiMAX Forum (WMF) have worked on this issue. In this paper, we review and compare ES architectures proposed by the IETF and the WMF, and summarize the IEEE 802's relevant activities.