• Title/Summary/Keyword: I-Designer

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Hardware Approach to Fuzzy Inference―ASIC and RISC―

  • Watanabe, Hiroyuki
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 1993.06a
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    • pp.975-976
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    • 1993
  • This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}

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Estimation of the Superelevation Safety Factor Considering Operating Speed at 3-Dimensional Alignment (입체선형의 주행속도를 고려한 편경사 안전율 산정에 관한 연구)

  • Park, Tae-Hoon;Kim, Joong-Hyo;Park, Je-Jin;Park, Ju-Won;Ha, Tae-Jun
    • Journal of Korean Society of Transportation
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    • v.23 no.7 s.85
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    • pp.159-163
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    • 2005
  • The propriety between suppliers and demanders in geometric design is very important. Although the final purpose of constructing roads is to concern about the driver s comfort, unfortunately, it has not been considered so far. We've considered the regularity and quickness in considering driver's comfort but there should be considered the safety for the accident as well. If drivers are appeared to be more speeding than designer's intention, there will be needed some supplements to increase the safety rate for the roads. Even if both an upward and downward section are supposed to exist at the same time for solid geometry of the roads like this, it is true that the recent design for the 3-D solid geometry section has been done as flat 2-D and the minimum plane curve radius and the maximum cant have been decided just by calculating without considering operating speed between an upward and downward section at the same point. In this investigation, thus, I'd like to calculate the safety of the cant by considering the speed features of the solid geometry for the first lane of four lane rural roads. To begin with, we investigated the driving speed of the car, which is not been influenced by a preceding car to analyze the influence of the geometrical structure by using Nc-97. Secondly, we statistically analyzed the driving features of the solid geometry after comparing the 6 sections, that is, measuring the driving speed feature at 12 points and combining the influence of the vertical geometry and plane geometry to the driving speed of the plane curve which was researched before. Finally, we estimated the value of cant which considers the driving speed not by using it which has applied uniformly without considering it properly, though there were some differences between a designed speed and driving speed through the result of the basic statistical analysis but by introducing the new safety rate rule, a notion of ${\alpha}$. As a result of the research, we could see the driving features of the car and suggest the safety rate which considers these. For considering the maximum cant, if we apply the safety rate, the result of this experiment, which considers 3-D solid geometry, there'll be the improvement of the driver's safety for designing roads. In addition, after collecting and analyzing the data for the road sections which have various geometrical structures by expanding this experiment it is considered that there should be developed the models which considers 3-D solid geometry.

The Development of a Model for Selecting Method of Entry for Apartment in Remodeling an Underground Parking Lot (지하주차장 리모델링 공사시 주동진입방법 선정 모델 개발)

  • Song, Nak-Hyun;Jung, In-Su;Lee, Chan-Sik
    • Korean Journal of Construction Engineering and Management
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    • v.10 no.2
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    • pp.65-74
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    • 2009
  • It is expected that the number of apartment complexes in Korea that are over 20 years old will rapidly increase to more than 3,500,000. Consequently, the remodeling of these buildings is being revitalized throughout the country. Among the requirements for such remodeling, the expansion of parking lots has considerable weight. When enlarging a parking lot, the access route from an underground floor to the main building (i.e., the means of entry into the main building) determines the possibility of vertical enlargement for elevators, the size of the parking lot, the construction period, and construction expenses, etc. When enlarging an underground parking lot of an apartment complex, the access between the main building and the parking lot, as well as the inhabitants' requirements for entering the main building, are generally determined based on the designer's experience, rather than on the exact estimation of the peculiarity of the complex. In order to resolve such a problem, when enlarging an underground parking lot, a systematic and rational method is needed for selecting the means of entry into the main building. In this study, a selection model is derived for the method of selecting an access route into the main building when constructing an underground parking lot, in order to provide a reasonable decision-making process. A research method was investigated for determining the access route into the main building when enlarging a parking lot. On the basis of research carried out through in-depth interviews with experts, the characteristics for each means of entry into the main building were analyzed and the factors affecting the selection of the access route were deduced. The affecting factors selected were construction efficiency, convenience efficiency and economic efficiency. Weight values were then estimated for the selected affecting factors by applying the AHP method. Results showed that convenience efficiency, which gained the highest value, is the most important factor in selecting the means of entry into the main building. The most suitable means of entry into the main building was also suggested after estimating the applicability of the site by selecting complexes with remodeling possibility. This study will be applied as a reference for selecting the means of entry into the main building when constructing an underground parking lot particularly for older apartment complexes.

Thought Experiments: on the Working Imagination and its Limitation (사고실험 - 상상의 작용과 한도에 대해)

  • Hwang, Hee-sook
    • Journal of Korean Philosophical Society
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    • v.146
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    • pp.307-328
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    • 2018
  • The use of thought experiments has a long history in many disciplines including science. In the field of philosophy, thought experiments have frequently appeared in the pre-existing literature on the contemporary Analytic Philosophy. A thought experiment refers to a synthetic environment where the designer of the experiment-with his or her intuition and imagination-tests common-sense knowledge. It can be understood as a conceptual tool for testing the validity of the common understanding of an issue or a phenomenon. However, we are not certain about the usefulness or efficacy of a thought experiment in knowledge production. The design of a thought experiment is meant to lure readers into believing as intended by the experiment itself. Thus, regardless of the purpose of a thought experiment, many readers who encounter the experiment could feel deceived. In this paper, to analyze the logic of thought experiments and to seek the source of uneasiness the readers and critics may feel about thought experiments, I draw lessons from three renowned thought-experiments: Thomson's 'ailing violinist', Putnam's 'brain in a vat', and Searle's 'Chinese room'. Imaginative thought experiments are usually constructed around a gap between the reality and the knowledge/information at hand. From the three experiments, several lessons can be learned. First, the evidence of the existence of a gap provided via thought experiments can serve as arguments for counterfactual situations. At the same time, the credibility and efficacy of the thought experiments can be damaged as soon as the thought-experiments are carried out with inappropriate and/or murky directions regarding the procedures of the experiment or the background of the study. According to D. R. Hofstadter and D. C. Dennett(1981), the 'knob setting' in a thought experiment can be altered in the middle of a simulation of the experimental condition, and then the implications of the thought experiment change altogether, indicating that an entirely different conclusion can be deduced from thought experiment. Lastly, some pre-suppositions and bias of the experiment designers play a considerable role in the validity and the chances of success of a thought experiment; thus, it is recommended that the experiment-designers refrain from exercising too much of their imagination in order to avoid contaminating the design of the experiment and/or wrongly accepting preconceived/misguided conclusions.