• Title/Summary/Keyword: I/O buffer

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A Low Power SDRAM Output Buffer with Minimized Power Line Noise and Feedthrough Current (최소화된 Power line noise와 Feedthrough current를 갖는 저 전력 SDRAM Output Buffer)

  • Ryu, Jae-Hui
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.8
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    • pp.42-45
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    • 2002
  • A low power SDRAM output buffer with reduced power line noise and feedthrough current is presented. In multi I/O SDRAM output buffer, feedthrough current as well as the corresponding power dissipation are reduced utilizing proposed undershoot protection circuits. Ground bounce is minimized by the pull down driver using intelligent feedback scheme. Ground bounce noise is reduced by 66.3% and instantaneous and average power are reduced by 27.5% and 11.4%, respectively.

WWCLOCK: Page Replacement Algorithm Considering Asymmetric I/O Cost of Flash Memory (WWCLOCK: 플래시 메모리의 비대칭적 입출력 비용을 고려한 페이지 교체 알고리즘)

  • Park, Jun-Seok;Lee, Eun-Ji;Seo, Hyun-Min;Koh, Kern
    • Journal of KIISE:Computing Practices and Letters
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    • v.15 no.12
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    • pp.913-917
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    • 2009
  • Flash memories have asymmetric I/O costs for read and write in terms of latency and energy consumption. However, the ratio of these costs is dependent on the type of storage. Moreover, it is becoming more common to use two flash memories on a system as an internal memory and an external memory card. For this reason, buffer cache replacement algorithms should consider I/O costs of device as well as possibility of reference. This paper presents WWCLOCK(Write-Weighted CLOCK) algorithm which directly uses I/O costs of devices along with recency and frequency of cache blocks to selecting a victim to evict from the buffer cache. WWCLOCK can be used for wide range of storage devices with different I/O cost and for systems that are using two or more memory devices at the same time. In addition to this, it has low time and space complexity comparable to CLOCK algorithm. Trace-driven simulations show that the proposed algorithm reduces the total I/O time compared with LRU by 36.2% on average.

High-$J_c$ $GdBa_2Cu_3O_y$ films on $BaHfO_3$ buffered IBAD MgO template ($BaHfO_3$ 완충층을 사용한 IBAD MgO 기판 위에 제조된 고임계전류밀도의 $GdBa_2Cu_3O_y$ 박막)

  • Ko, K.P.;Lee, J.W.;Ko, R.K.;Moon, S.H.;Oh, S.S.;Yoo, S.I.
    • Progress in Superconductivity and Cryogenics
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    • v.13 no.1
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    • pp.6-11
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    • 2011
  • The $BaHfO_3$ (BHO) buffer layer on the IBAD MgO template was turned to be effective for a successful fabrication of $GdBa_2Cu_3O_{7-{\delta}}$ (GdBCO) films with high critical current density ($J_c$). Both the BHO buffer layers and GdBCO films were prepared by pulsed laser deposition (PLD). The effects of the PLD conditions, including substrate temperature ($T_s$), oxygen partial pressure ($PO_2$), and deposition time on the in-plane texture, surface roughness, and microstructures of the BHO buffer layers on the IBAD MgO template were systematically studied for processing optimization. The c-axis oriented growth of BHO layers was insensitive to the deposition temperature and the film thickness, while the in-plane texture and surface roughness of those were improved with increasing $T_s$ from 700 to $800^{\circ}C$. On the optimally processed BHO buffer layer, the highest $J_c$ value (77 K, self-field) of 3.68 $MA/cm^2$ could be obtained from GdBCO film deposited at $780^{\circ}C$, representing that BHO is a strong candidate for the buffer layer on the IBAD MgO template.

Effect of p-type a-SiO:H buffer layer at the interface of TCO and p-type layer in hydrogenated amorphous silicon solar cells

  • Kim, Youngkuk;Iftiquar, S.M.;Park, Jinjoo;Lee, Jeongchul;Yi, Junsin
    • Journal of Ceramic Processing Research
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    • v.13 no.spc2
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    • pp.336-340
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    • 2012
  • Wide band gap p-type hydrogenated amorphous silicon oxide (a-SiO:H) buffer layer has been used at the interface of transparent conductive oxide (TCO) and hydrogenated amorphous silicon (a-Si:H) p-type layer of a p-i-n type a-Si:H solar cell. Introduction of 5 nm thick buffer layer improves in blue response of the cell along with 0.5% enhancement of photovoltaic conversion efficiency (η). The cells with buffer layer show higher open circuit voltage (Voc), fill factor (FF), short circuit current density (Jsc) and improved blue response with respect to the cell without buffer layer.

Policy for Selective Flushing of Smartphone Buffer Cache using Persistent Memory (영속 메모리를 이용한 스마트폰 버퍼 캐시의 선별적 플러시 정책)

  • Lim, Soojung;Bahn, Hyokyung
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.22 no.1
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    • pp.71-76
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    • 2022
  • Buffer cache bridges the performance gap between memory and storage, but its effectiveness is limited due to periodic flush, performed to prevent data loss in smartphones. This paper shows that selective flushing technique with small persistent memory can reduce the flushing overhead of smartphone buffer cache significantly. This is due to our I/O analysis of smartphone applications in that a certain hot data account for most of file writes, while a large proportion of file data incurs single-writes. The proposed selective flushing policy performs flushing to persistent memory for frequently updated data, and storage flushing is performed only for single-write data. This eliminates storage write traffic and also improves the space efficiency of persistent memory. Simulations with popular smartphone application I/O traces show that the proposed policy reduces write traffic to storage by 24.8% on average and up to 37.8%.

Storage I/O Subsystem for Guaranteeing Atomic Write in Database Systems (데이터베이스 시스템의 원자성 쓰기 보장을 위한 스토리지 I/O 서브시스템)

  • Han, Kyuhwa;Shin, Dongkun;Kim, Yongserk
    • Journal of KIISE
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    • v.42 no.2
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    • pp.169-176
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    • 2015
  • The atomic write technique is a good solution to solve the problem of the double write buffer. The atomic write technique needs modified I/O subsystems (i.e., file system and I/O schedulers) and a special SSD that guarantees the atomicity of the write request. In this paper, we propose the writing unit aligned block allocation technique (for EXT4 file system) and the merge prevention of requests technique for the CFQ scheduler. We also propose an atomic write-supporting SSD which stores the atomicity information in the spare area of the flash memory page. We evaluate the performance of the proposed atomic write scheme in MariaDB using the tpcc-mysql and SysBench benchmarks. The experimental results show that the proposed atomic write technique shows a performance improvement of 1.4~1.5 times compared to the double write buffer technique.

An Efficient Algorithm for Restriction on Duplication Caching between Buffer and Disk Caches (버퍼와 디스크 캐시 사이의 중복 캐싱을 제한하는 효율적인 알고리즘)

  • Jung, Soo-Mok
    • Journal of the Korean Society for Industrial and Applied Mathematics
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    • v.10 no.1
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    • pp.95-105
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    • 2006
  • The speed of hard disk which is based on mechanical operation is more slow than processor. The growth of processor speed is rapid by semiconductor technology, but the growth of disk speed which is based on mechanical operation is not enough. Buffer cache in main memory and disk cache in disk controller have been used in computer system to solve the speed gap between processor and I/O subsystem. In this paper, an efficient buffer cache and disk cache management scheme was proposed to restrict duplicated disk block between buffer cache and disk cache. The performance of the proposed algorithm was evaluated by simulation.

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A study on TCR characteristic of $TaN/Al_{2}O_{3}$ thin film resistors ($TaN/Al_{2}O_{3}$ 박막 저항소자 개발에 관한 연구)

  • Kim, I.S.;Cho, Y.R.;Min, B.K.;Song, J.S.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.05b
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    • pp.82-85
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    • 2002
  • In recent years, the tantalum nitride(TaN) thin-film has been developed for the electronic resistor and capacitor. In this papers, this study presents the surface profile and sheet-resistance property relationship of reactive-sputtered TaN thin film resistor processed by buffer of Ti and Cr on alumina substrate. The TCR properties of the TaN films were discussed in terms of reactive gas ratio, ratio of nitrogen, crystallization and thin films surface morphology due to annealing temperature. It is clear that the TaN thin-films resistor electrical properties are low TCR related with it's buffer layer condition. Ti buffer layer thin film resistor having a good thermal stability and lower TCR properties then Cr buffer expected for the application to the dielectric material of passive component.

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Deposition of Ce$O_{2}$YSZ/$Y_{2}$$O_{3}$ buffer layers on Ni and NiW substrate by PLD (PLD법을 이용한 Ni과 NiW기판위에 Ce$O_{2}$YSZ/$Y_{2}$$O_{3}$완충층 증착)

  • D. Q. Shi;R. K. Ko;K. J. Song;J. K. Chung;Park, S. J.;J. Yang;S. I. Yoo;Park, C.
    • Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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    • 2003.10a
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    • pp.139-141
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    • 2003
  • Multiple CeO$_2$/YSZ/Y$_2$O$_3$buffer layers, and subsequent YBCO films were deposited on the biaxially textured pure Ni and Ni + 3at%W substrates using pulsed laser deposition. The deposition conditions of buffer layers on Ni and NiW were studied and compared. Good biaxial textures of buffer layers have been obtained on both substrates. The Jc's of YBCO films on these metal substrates were greater than 1$\times$10$^{6}$ A/$\textrm{cm}^2$ at 77K, 0T.

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