• Journal of the Korean Institute of Telematics and Electronics
• /
• v.23 no.6
• /
• pp.950-956
• /
• 1986

In this paper, a direct addressing mode of a microprocessor is introduced to save memory capacity, and also a dedicated digital filter is constructed to speed up the filter processing and to enable an easy selection of the impulse response types. A theoretical analysis has been conducted on the errors caused by the finite word klength, rounding-off and multiplication procedures. The digital filter designed by the proposed method is made into a module which can function as a 7th-order recursive or a 14-order nonrecursive type with a simples witch operation. The proposed filter is implemented on a printed-circuit board. The frequency characteristics of this filter can be controlled by the multiplication values stored in ROMs. A low-pass, a high-pass and a band-pass filter have been designed and their frequency characteristics are verified by actual measurements. For a order higher filer, two filter modules have been cascaded into an integrated filter of 23rd-order non-recursive low-pass type and a 12th-order recursive multiband type. Their frequency characteirstics have been found to agree with the theory.

• Journal of Electrical Engineering and Technology
• /
• v.8 no.5
• /
• pp.1152-1156
• /
• 2013

We propose a compact high-order(9th) UHF bandpass filter comprising the composite right-handed and left-handed(CRLH) zeroth-order resonators(ZORs) in the form of the three cascaded-triplets(CTs) newly applied to the ZOR filter which results in very steep skirt. The method is verified by circuit and EM simulations and measurement with metamaterial properties.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.49 no.8
• /
• pp.63-72
• /
• 2012

In this paper, we proposed a parallel architecture of line & block edge filter for high-performance H.264/AVC deblocking filter for Quad Full High Definition(Quad FHD) video real time processing. To improve throughput, we designed 4-parallel block edge filter with 16 line edge filter. To reduce internal buffer size and processing cycle, we scheduled 4-parallel zig-zag scan order as deblocking filtering order. To avoid data conflicts we placed 1 delay cycle between block edge filtering. We implemented interleaving buffer, as internal buffer of block edge filter, to sharing buffer for reducing buffer size. The proposed architecture was simulated in 0.18um standard cell library. The maximum operation frequency is 108MHz. The gate count is 140.16Kgates. The proposed H.264/AVC deblocking filter can support Quad FHD at 113.17 frames per second by running at 90MHz.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.68 no.1
• /
• pp.108-121
• /
• 2019

This paper presents the study results on the design of the correction filter to improve the azimuth error estimation of the high-speed guided missile launched from the warship after the transfer alignment. We theoretically proved that the transfer alignment performance is determined by the accuracy of the marine inertial navigation system and the observability of the attitude error state variable in the transfer alignment filter, and that most of navigation errors in high-speed guided missile are caused by azimuth error. In order to improve the azimuth estimation performance of the correction filter, the multiple adaptive estimation method and the adaptive filters adapting the measurement noise covariance or the process noise covariance are proposed. The azimuth estimation performance of the proposed adaptive filter and the existing Kalman filter are compared and analyzed each other for 8 different transfer alignment accuracy cases. As a result of comparison and analysis, it was confirmed that the adaptive filter adapting the process noise covariance has the best azimuth estimation performance. These results can be applied to the design of correction filters for high-speed guided missile.

• Proceedings of the IEEK Conference
• /
• 2000.06d
• /
• pp.242-245
• /
• 2000

In this paper, we present a color interpolation technique based on artificial neural networks for a single-chip CCD (charge-coupled device) camera with a Bayer color filter array (CFA). Single-chip digital cameras use a color filter array and an interpolation method in order to regenerate high quality color images from sparsely sampled images. We applied 3-layer feedforward neural networks in order to interpolate missing pixel from surrounding pixels. And we compared the proposed method with conventional interpolation methods such as the proposed interpolation algorithm based on neural networks provides a better performance than the conventional interpolation algorithms.

• Journal of the Korea Society of Computer and Information
• /
• v.7 no.2
• /
• pp.68-72
• /
• 2002

In this study, I studied on the principle of OTA and it's basic application. Here, I designed second order filter using OTA. This filter has three inputs and one output. If we use each one input among them, we can get a low pass, high pass and band pass output. In the result of the computer simulation. the linear characteristics was superior to the conventional Op-Amp filter. And this circuit is advantageous to making an IC. This will be used to the communication system which has the low distortion and high frequency circuit. This study will have to be continued to form a higher order filter using OTA.

• Journal of Electrical Engineering and Technology
• /
• v.12 no.2
• /
• pp.683-688
• /
• 2017

The unscented Kalman filter features a direct transforming process involving unscented transformation for removing the linearization process error that may occur in the extended Kalman filter. This paper proposes a reduced-order unscented Kalman filter for the sensorless control of a permanent magnet synchronous motor. The proposed method can reduce the computational load without degrading the accuracy compared to the conventional Kalman filters. Moreover, the proposed method can directly estimate the electrical rotor position and speed without a back-electromotive force. The proposed Kalman filter for the sensorless control of a permanent magnet synchronous motor is verified through the simulation and experimentation. The performance of the proposed method is evaluated over a wide range of operations, such as forward and reverse rotations in low and high speeds including the detuning parameters.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.25 no.2
• /
• pp.227-232
• /
• 1988

A semicustom VLSI design fo digital filters used in TDM/FDM transmultiplexer is described. A filter bank composed of only all-pass digital filter sections are implemented with the polyphase network. The use of all-pass filters as basic building blocks is shown to provide a trans-multiplexer structure that has low computational requirements, low quantization noise, and high modularity. The silicon compiler system is used to reduce the design time and to increase the credibility of designed filters. As a prototype, 1st and 2nd order all pass filter are designed, using CMOS N-well double metal technology. The chip sizes of first order filter and the second order filter are 2652 x 533\ulcorner\ulcorner 5334x4300\ulcorner\ulcorner respectively.

• Journal of Electrical Engineering and Technology
• /
• v.7 no.4
• /
• pp.582-588
• /
• 2012

In this paper, a highly miniaturized and performed UWB bandpass filter has been newly designed and implemented by embedding all the passive elements into a multi-layered PCB substrate with high dielectric $SrTiO_3$ composite film for 3.1 - 4.75 GHz compact UWB system applications. The high dielectric composite film was utilized to increase the capacitance densities and quality factors of capacitors embedded into the PCB. In order to reduce the size of the filter and avoid parasitic EM coupling between the embedded filter circuit elements, it was designed by using a $3^{rd}$ order Chebyshev circuit topology and a capacitive coupled transformation technology. Independent transmission zeros were also applied for improving the attenuation of the filter at the desired stopbands. The measured insertion and return losses in the passband were better than 1.68 and 12 dB, with a minimum value of 0.78 dB. The transmission zeros of the measured response were occurred at 2.2 and 5.15 GHz resulting in excellent suppressions of 31 and 20 dB at WLAN bands of 2.4 and 5.15 GHz, respectively. The size of the fabricated bandpass filter was $2.9{\times}2.8{\times}0.55(H)mm^3$.

• Journal of Power Electronics
• /
• v.18 no.1
• /
• pp.160-170
• /
• 2018

For high power photovoltaic (PV) grid-connected converters, high order filters such as multi-tuned filters and Traps+RC filters with outstanding filtering performance have been widely researched. In this paper, the optimization of a multi-tuned filter with a low damping resistance and research on its corresponding control scheme have been combined to improve the performance of the proposed filter. Based on the characteristics of the switching harmonics produced by PWM, the proposed filter is optimized to further improve its filtering performance. When compared with the more common Traps+RC filter, the advantages of the proposed filter with low damping resistances in attenuating the major switching harmonics have been demonstrated. In addition, a simpler topology and reduced power loss can be achieved. On the other hand, to make the implementation of the proposed filter possible, on the base of the unique frequency response characteristic of the proposed filter, a digital single-loop control scheme has been proposed. This scheme is a simple and effective means to suppress the resonance peak caused by a lack of damping. Therefore, a smaller volume, better efficiency of the proposed filter, and easy implementation of the corresponding control scheme can be realized. Finally, the superiority of the proposed filter topology and control scheme is verified in experiments.