• 제어로봇시스템학회:학술대회논문집
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• 2002.10a
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• pp.96.6-96
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• 2002

In this study an image processing system is designed and developed, which can detect and assort some defects on the surface of an object moving with high speed. For real time surface detection of high speed moving object, the fast processing should be managed and the image information including some surface features should be captured. It is difficult to acquire the noise free image due to various light sources and high speed moving materials under the environment of the general industrial site. In general, because pre-processing methods are employed for getting a noise free feature, the image processing speed has some limitation and the expensive image processing devices are required. This...

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1998.11a
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• pp.194-197
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• 1998

Image Processing은 Image Data가 대량이고 내재된 정보가 병렬로 연관성을 가진다는 측면에서 실시간 처리가 용이하지 알다. 본 연구에서는 High Speed Real Time Image Processing을 위한 IPU(Image Processing Unit)와 이를 구동하기 위한 High Speed Real Time image Processing Language인 IPASM(Image Processing Assembly)을 제안한다. 우선 IPU의 기본개념을 설명하고 IPU의 구현을 위한 IPLU(Image Processing Logic Unit)를 설계한다. 그 후 Window98환경에서 구동 가능한 IPASM Interpreter를 실제로 제작하여 IPU의 동작방식을 간접적으로 진단한다.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2003.06a
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• pp.110-113
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• 2003

In this paper, the multi-channel high speed data acquisition system is implemented. This high speed signal processing system for 3-D image display is applicable to the manipulation of a medical image processing, multimedia data and various fields of digital image processing. In order to convert the analog signal into digital one, A/D conversion circuit is designed. PCI interface method is designed and implemented, which is capable of transmission a large amount of data to computer. In order to, especially, channel extendibility of images acquisition, bus communication method is selected. By using this bus method, we can interface each module effectively. In this paper, 32-channel A/D conversion and PCI interface system for 3-dimensional and real-time display of the retina image is developed. The 32-channel image acquisition system and high speed data transmission system developed in this paper is applicable to not only medical image processing as 3-D representation of retina image but also various fields of industrial image processing in which the multi-point realtime image acquisition system is needed.

• Proceedings of the KIEE Conference
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• 1990.11a
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• pp.439-442
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• 1990

A powerful general purpose image processing processor is developed using a high-speed DSP chip, TMS320C30. The image processing processor, compatible to the standard VME bus, is composed of VME bus interface unit, video rate image grabbing/coding unit, TMS320C30 interface unit and bank of high-speed SRAMs. The performance is evaluated experimentally with the general image processing algorithms and the results show that the developed processor is capable of high speed image processing.

• 제어로봇시스템학회:학술대회논문집
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• 2001.10a
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• pp.118.5-118
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• 2001

This paper describes an image processing method for inspecting the surface outlook of high speed moving plates. Noise free image and a new real time processing methods are required to inspect the surface outlook of the high speed moving plates in real time. It is difficult to get a noise free image due to a signal noise, a light noise and background image in typical industrial factory. Thus, pre-processing techniques should be required to get a good image and produce so many time steps to proceed the image data. The objective of this research is to get image on the surface of the moving plates with a speed of 1m/sec and to detect some defaults on the surface image. So, the pre-processing techniques ...

• Proceedings of the KSRS Conference
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• 2007.10a
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• pp.526-529
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• 2007

Due to its inherent feature of high-resolution satellite, there is strong need in some specific area to minimize the processing time required to get a standard image on hand from downlink signal acquisition. However, in general image processing system, it takes considerable time to get image data up to certain level from raw data acquisition because the huge amount of data is dealt sequentially as input data. This paper introduces the high-speed image processing system which generates the image data only for the area selected by user. To achieve the high speed performance, this system includes Quick Look Image display function with sampling, ROI selection function, Image Line Index function, and Distributed processing function. The developed RPS was applied to KOMPSAT-2 320Mbps downlink channel and its effectiveness was successfully demonstrated. This feature to provide the image product very quickly is expected to promote the application of high resolution satellite image.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.5
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• pp.162-167
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• 1994

The binary image normalization method in image processing can be used in several fields, Especially, its high speed processing method and its hardware implmentation is more useful, A normalization process of each character in character recognition requires a lot of processing time. Therefore, the research was done as a part of high speed process of OCR (optical character reader) implementation as a pipeline structure with host computer in hardware to give temporal parallism. For normalization process, general purpose CPU,MC68000, was used to implement it. As a result of experiment, the normalization speed of the hardware is sufficient to implement high speed OCR which the recognition speed is over 140 characters per second.

• Journal of Institute of Control, Robotics and Systems
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• v.10 no.2
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• pp.178-184
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• 2004

In this paper, we designed an image processing system for the high speed line-scan camera which adopts the new memory model we proposed. As a resolution and a data rate of the line-scan camera are becoming higher, the faster image processing systems are needed. But many conventional systems are not sufficient to process the image data from the line-scan camera during a very short time. We designed the memory controller which eliminates the time for transferring image data from the line-scan camera to the main memory with high-speed SRAM and has a dual-port configuration therefore the DSP can access the main memory even though the memory controller are writing the image data. The memory controller is implemented by VHDL and Xilinx SPARTAN-IIE FPGA.

• Proceedings of the KIEE Conference
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• 2005.10b
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• pp.177-179
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• 2005

This paper suggests a high-speed blurred blob image inspection algorithm. When we inspect some products using high-resolution camera, the detected blob images usually have severe blur. And the blur makes it hard to detect an object. There are many blur-processing algorithms, but most of them have no real-time property for high-speed applications at all. In this paper, an MMX technology based algorithm is suggested. The suggested algorithm was found to be effective to detect the blurred blob images via many simulations and long time real-plant experiments.

• Journal of Institute of Control, Robotics and Systems
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• v.5 no.6
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• pp.691-697
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• 1999

This paper describes the implementation of a high speed image processing board. This image processing board is consist of a image acquisition part and a image processing part. The image acquistion part is digitizing the image input data from CIS and save it to the dual port RAM. By putting on the dual port memory between two parts, during acquistion of image, the image processing part can be effectively processing of large-volume image data. Most of all image preprocessing part are integrated in a large-scaled FPGA. We arwe using ADSP-2181 of the Analog Device Inc., LTD. for a image processing part, and using the available all memory of DSP for the large-volume image data. Especially, using of IDMA exchanges the data with the external microprocessor or the external PC, and can watch the result of image processing and acquired image. Finally, we show that an implemented image processing board used for the simulation of image retreval by the one of the typical application.