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Design of High-Speed Image Processing System for Line-Scan Camera

라인 스캔 카메라를 위한 고속 영상 처리 시스템 설계

  • 이운근 (부산경상대학 디지털애니메이션과) ;
  • 백광렬 (부산대학교 전자전기통신공학부) ;
  • 조석빈 (부산대학교 전자공학과)
  • Published : 2004.02.01

Abstract

In this paper, we designed an image processing system for the high speed line-scan camera which adopts the new memory model we proposed. As a resolution and a data rate of the line-scan camera are becoming higher, the faster image processing systems are needed. But many conventional systems are not sufficient to process the image data from the line-scan camera during a very short time. We designed the memory controller which eliminates the time for transferring image data from the line-scan camera to the main memory with high-speed SRAM and has a dual-port configuration therefore the DSP can access the main memory even though the memory controller are writing the image data. The memory controller is implemented by VHDL and Xilinx SPARTAN-IIE FPGA.

Keywords

References

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