• 한국세라믹학회지
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• 제53권5호
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• pp.563-567
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• 2016

The structural properties of $HfO_2$ films could be improved by thermal treatment owing to their crystallization. We deposited $HfO_2$ films on sapphire by radio frequency (RF) magnetron sputtering, whose base vacuum pressure was lower than $4.5{\times}10^{-6}$ Pa, RF power was 100 W, working temperature was $200^{\circ}C$, working pressure was 3 mTorr, and the density of the active gas (Argon) was 20 sccm. After depositing the $HfO_2$ films, the samples were thermally treated by rapid thermal annealing (RTA) in $O_2$ ambient at different temperatures. Subsequently, the measured physical properties (structural, morphological, and optical) indicated that the crystallite size, refractive index at a wavelength of 632 nm, and packing density increased with rising temperatures. In particular, an $HfO_2$ film thermally treated at $800^{\circ}C$ in $O_2$ ambient had the highest refractive index of 2.0237 and packing density of 0.9638. The relation between optical and structural properties was also analyzed.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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• pp.374-375
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• 2006

This paper describes anodic bonding characteristics of MCA to Si-wafer using evaporated Pyrex #7740 glass thin-films for MEMS applications. Pyrex #7740 glass thin-films with the same properties were deposited on MCA under optimum RF sputter conditions (Ar 100 %, input power $1\;W/cm^2$). After annealing at $450^{\circ}C$ for 1 hr, the anodic bonding of MCA to Si-wafer was successfully performed at 600 V, $400^{\circ}C$ in $110^{-6}$ Torr vacuum condition. Then, the MCA/Si bonded interface and fabricated Si diaphragm deflection characteristics were analyzed through the actuation and simulation test. It is possible to control with accurate deflection of Si diaphragm according to its geometries and its maximum non-linearity being 0.05-0.08 %FS. Moreover, any damages or separation of MCNSi bonded interfaces did not occur during actuation test. Therefore, it is expected that anodic bonding technology of MCNSi-wafers could be usefully applied for the fabrication process of high-performance piezoelectric MEMS devices.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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• pp.637-638
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• 2005

AAO templates were fabricated using a two-step anodization process with pretreatment such as electro polishing and annealing. To reduce process time and get well-aligned pore array, rapid thermal processor by an halogen lamp was employed in vacuum state at $500^{\circ}C$ for various time. The pore array of AAO template annealed at $500^{\circ}C$ for 2 h is comparable to a template annealed in conventional furnace at $500^{\circ}C$ for 30 h. The well-fabricated AAO template has the mean pore diameter of 70 nm, the barrierlayer thickness of 25 nm, and the pore depth of $9{\mu}m$. And the pore density can be as high as $2.0\times10^{10}cm^{-2}$.

• 한국재료학회지
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• 제15권7호
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• pp.486-490
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• 2005

Thin films of tungsten oxide and nickel oxide were deposited on $Al_2O_3/Si-substrate$ by high vacuum thermal evaporation. The properties of microstructure and crystallinity were analyzed by SEM and XRD respectively. $WO_3$ films without addition of NiO showed polycrystalline structure after annealing at $500^{\circ}C$ for SO min. There were the cracks between the polycrystalline grains and the crack width was increased with the thickness of $WO_3$ films. The cracks in the $WO_3$ films could be controlled by an optimum deposition of NiO on $WO_3$ films and either less or more than the optimum addition fails to suppress the cracks. A process mechanism to suppress the crack has been discussed.

• 한국재료학회지
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• 제8권12호
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• pp.1182-1189
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• 1998

Si 기판을 실온과 $600^{\circ}C$로 유지하면서 동시 증착 방법으로 (Ti+2Si)를 증착한 후 $N_2$ 분위기에서 Ti를 증발시켜 TiN($300\AA$)/(Ti+2Si, $300\AA$)/Si(100) 구조의 시료를 제작한 다음 초고진공에서 in-situ로 열처리하여 양질의 $TiN/TiSi_2$-bilayer를 형성하였다 열처리 온도가 $700^{\circ}C$ 이상에서 (111) texture 구조를 가지면서 화학 양론적으로 $Ti_{0.5}N_{0.5}$인 박막과 C54-$TiSi_2$박막이 형성되었다. $TiN/C54-TiSi_2/Si$ (100)구조의 계면은 응집 현상이 없이 평활하였으며, $C54-TiSi_2$상은 에피택셜 성장되었다. $TiN/TiSi_2$-이중구조막의 면저항은 열처리 온도에 따라 감소하였으며, $700^{\circ}C$ 이상의 열처리 온도에서는 면저항 값이 $2.5\omega/\textrm{cm}^2$ 였다.

• 한국재료학회지
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• 제8권10호
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• pp.918-924
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• 1998

본 연구는 티타늄과 활성탄소 원료분말을 반응밀링법에 의해 합성시, 밀링시간에 따른 Ti-TiC 복합재료의 미세조직과 기계적 성질에 미치는 TiC vol.% 및 열간압축성형온도의 영향에 관해 조사하였다. 티타늄과 활성 탄소 원료분말을 300시간 밀링 후 $5\mu\textrm{m}$이하의 미세한 구형의 Ti-TiC복합분말을 생성시킬 수 있었다. 반응밀링된 분말을 $1000^{\circ}C$이상에서 1시간동안 진공열간압축성형한 경우 이론밀도의 98%에 가까운 우수한 성형체를 얻었으며, TiC입자가 티타늄 기지 전반에 걸쳐 고르게 분산되어 Ti-TiC 복합재료의 기계적 특성을 향상시켰다. Ti-TiC복합재료의 고온안정성을 고찰하기 위해 $600^{\circ}C$등온열처리한 결과 80시간까지는 경도의 큰 변화없이 열적으로 안정하였다. Ti-20vol%TiC 복합재료를 $700^{\circ}C$에서 고온압축시험을 한 경우 330MPa의 높은 항복강도값을 나타내었다.

• 한국재료학회지
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• 제15권2호
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• pp.89-92
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• 2005

The induction melting was employed to prepare Nb-doped $CoSb_3$ skutterudites and their thermoelectric properties were investigated. Single phase $\delta-CoSb_3$ was successfully obtained by induction melting and subsequent annealing at $400^{\circ}C$ for 2 hrs in vacuum. The positive signs of Seebeck coefficients for all the specimens revealed that Nb atoms acted as p-type dopants by substituting Co atoms. Electrical conductivity decreased and then increased with increasing temperature, indicating mixed conduction behavior. Electrical conductivity increased by Nb doping, and it was saturated at high temperature. Maximum value of the thermoelectric power factor was shifted to higher temperature with increasing the amount of Nb doping, mainly originated from the high Seebeck coefficient around mixed conduction temperature and high electrical conductivity.

• 전기전자학회논문지
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• 제27권1호
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• pp.25-29
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• 2023

폴리실라잔 고체 전해질 층과 은(Ag) 활성 전극의 공정이 멤리스터의 전기적 특성에 미치는 영향을 살펴보았다. 더 높은 온도에서 어닐링된 고체 전해질을 갖는 멤리스터가 더 낮은 온도에서 어닐링된 고체 전해질을 갖는 소자보다 더 높은 set voltage 및 더 나은 메모리 유지 특성을 보였다. 어닐링 온도 증가에 따른 set voltage의 증가 및 메모리 유지 특성의 향상은 각각 고체 전해질 층 내부의 빈 공간의 감소 및 균일도 증가 때문인 것으로 사료된다. 고체 전해질 층을 비교적 높은 온도에서 어닐링 할지라도, 폴리실라잔 용액의 농도가 지나치게 높은 경우에는 멤리스터의 저저항상태가 유지되지 못했다. 마지막으로, 용액공정으로 형성한 Ag 활성 전극을 갖는 멤리스터는 진공공정으로 형성한 Ag 활성 전극을 갖는 소자와 달리 WORM 특성을 갖는 것으로 나타났다. 이러한 WROM 특성은 용액공정 Ag 활성 전극에 존재하는 형태적 결함 때문인 것으로 사료된다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.341-341
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• 2016

The discovery of light emission in nanostructured silicon has opened up new avenues of research in nano-silicon based devices. One such pathway is the application of silicon quantum dots in advanced photovoltaic and light emitting devices. Recently, there is increasing interest on the silicon quantum dots (c-Si QDs) films embedded in amorphous hydrogenated silicon-nitride dielectric matrix (a-SiNx: H), which are familiar as c-Si/a-SiNx:H QDs thin films. However, due to the limitation of the requirement of a very high deposition temperature along with post annealing and a low growth rate, extensive research are being undertaken to elevate these issues, for the point of view of applications, using plasma assisted deposition methods by using different plasma concepts. This work addresses about rapid growth and single step development of c-Si/a-SiNx:H QDs thin films deposited by RF (13.56 MHz) and ultra-high frequency (UHF ~ 320 MHz) low-pressure plasma processing of a mixture of silane (SiH4) and ammonia (NH3) gases diluted in hydrogen (H2) at a low growth temperature ($230^{\circ}C$). In the films the c-Si QDs of varying size, with an overall crystallinity of 60-80 %, are embedded in an a-SiNx: H matrix. The important result includes the formation of the tunable QD size of ~ 5-20 nm, having a thermodynamically favorable <220> crystallographic orientation, along with distinct signatures of the growth of ${\alpha}$-Si3N4 and ${\beta}$-Si3N4 components. Also, the roles of different plasma characteristics on the film properties are investigated using various plasma diagnostics and film analysis tools.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.642-642
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• 2013

Graphene, two dimensional single layer of carbon atoms, has tremendous attention due to its superior property such as high electron mobility, high thermal conductivity and optical transparency. Especially, chemical vapor deposition (CVD) grown graphene has been used as a promising material for high quality and large-scale graphene film. Unfortunately, although CVD-grown graphene has strong advantages, application of the CVD-grown graphene is limited due to ineffective transfer process that delivers the graphene onto a desired substrate by using polymer support layer such as PMMA(polymethyl methacrylate). The transferred CVD-grown graphene has serious drawback due to remaining polymeric residues generated during transfer process, which induces the poor physical and electrical characteristics by a p-doping effect and impurity scattering. To solve such issue incurred during polymer transfer process of CVD-grown graphene, various approaches including thermal annealing, chemical cleaning, mechanical cleaning have been tried but were not successful in getting rid of polymeric residues. On the other hand, lithographical patterning of graphene is an essential step in any form of microelectronic processing and most of conventional lithographic techniques employ photoresist for the definition of graphene patterns on substrates. But, application of photoresist is undesirable because of the presence of residual polymers that contaminate the graphene surface consistent with the effects generated during transfer process. Therefore, in order to fully utilize the excellent properties of CVD-grown graphene, new approach of transfer and patterning techniques which can avoid polymeric residue problem needs to be developed. In this work, we carried out transfer and patterning process simultaneously with no polymeric residue by using a metal etch mask. The patterned thin gold layer was deposited on CVD-grown graphene instead of photoresists in order to make much cleaner and smoother surface and then transferred onto a desired substrate with PMMA, which does not directly contact with graphene surface. We compare the surface properties and patterning morphology of graphene by scanning electron microscopy (SEM), atomic force microscopy(AFM) and Raman spectroscopy. Comparison with the effect of residual polymer and metal on performance of graphene FET will be discussed.