• The Transactions of the Korean Institute of Power Electronics
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• v.21 no.2
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• pp.175-181
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• 2016

In the conventional E-bike, a 42 V/10 A Li-ion battery drives a 24 V/10 A BLDC motor via a 6-switch PWM DC/AC inverter. The major problems of the conventional battery-fed motor drive systems are listed as follows. To charge the battery, an external battery charger (adapter) is required, which degrades the portability of E-bike users. In addition, given the high-frequency operation of the motor drive inverter, the switching losses are significant, which degrades the whole power efficiency. High-voltage batteries (42 V) require a complex battery management system (BMS), which degrades the reliability of the battery pack. In this paper, an embedded boost-converter battery charger for E-bikes is proposed. The variable output boost converter, which converts 16.8 V battery voltage to the required variable voltage of the inverter input, can use a low-voltage battery and thus improve the reliability of batteries. By varying the inverter input voltage via boost converter, a DC link voltage control method can be applied to reduce the switching frequency of the inverter, which improves the whole power efficiency. Given that the function of a flyback charger is integrated in the proposed boost converter, the portability of the E-bike user can be maximized by excluding an external adapter. The validity of the proposed circuit will be confirmed by operation mode analysis and simulation. Moreover, experimental results of integrative charger using Li-ion battery and 200 W motor test will be showed with a prototype sample as well.

• Proceedings of the KIPE Conference
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• 2000.07a
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• pp.670-673
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• 2000

This paper describes a new inverter active inverter between a photovoltaic(PV) array and single-phase utility that avoid the bulky input(60Hz) transformer on the AC side. The interface employs a pwm boost converter on the DC side followed by a pwm boost converter on the DC side followed by a pwm current-forced single-phase rectifier for injecting the power from the PV array into the mains. The current waveform at the AC side remains sinusoidal and exactly in phase at all time. The circuit also has the advantage of requiring fewer switching device than high-frequency link system. This paper describes modeling of PV array and new system topology. Simulation results on the performance of the connection are also presented.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.1161-1164
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• 1992

In this paper demonstrates the possibiity of utilising clamped mode - series resonant converter technology in the high frequency link inverter configuration. Main circuit of the proposed inverter is analyzed through circuit analys and waveform simulation. In control circuit PLL circuit and 8 bit single chip microcontroller is adopted, therefore flexibility and accuracy of control circuit is increased.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.416-419
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• 1995

An analysis of a new load resonant inverter considering stray inductance is given. There are several different types for load resonant inverters. They can offer zero turn-on as well as zero turn-off switching losses, yielding high efficiency at high power and high frequencies. However, they didn't consider the influences of stray inductance. In conventional topology using lossless snubber capacitor, stray inductances result in very high frequency resonant current. Especially, these influences can be problematic in high power system such as induction heating system with large current of some 10A associated with it. These currents increase EMI problem, give harmful effects in gate driver's operation and increase loss of dc-link capacitor as well as snubber capacitor. Therefore, the effect of stray inductances should be treated and reduced. This paper presents a new load resonant inverter topology, which can reduce the effect of stray inductances.

• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.1110-1112
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• 2001

This paper presents a high frequency electronic ballast with high efficiency and high power factor. The proposed ballast have driven by the half bridge inverter which is linked diode rectifier without DC link capacitor. Minimized elements of circuit configurations can make the efficiency of the ballast increase. High input power factor which is up to 0.96 can be achieved and the crest factor of lamp current waveforms is controlled with below 1.75 by using a novel control scheme which has PFM and PWM methods simultaneously. In this paper, the circuit configurations of the proposed ballast and the control schemes are described. The usefulness of the proposed ballast is confirmed with the simulation results.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.1136-1141
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• 1992

This paper proposes a control technique to obtain high frequency quasi sinusoidal DC-Link waveform permitting zero-voltage-switching(ZVS). This operation results in reduction of commutation stress and switching losses in the power devices because they cause no switching loss in principle. But in existing control methods, the resonant capacitor voltage is not frequently made of zero-cross oscillation. We propose an optimum control stratege which can sustain oscillation and keep the capacitor voltage at an allowable level. Some experimental results are included to confirm the validity of the analytical results.

• Proceedings of the KIPE Conference
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• 1998.11a
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• pp.33-37
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• 1998

For the high power variable speed applications, the DCTLI(diode clamped three-level inverter) have been widely used. This paper describes the analysis of the neutral point current of the DCTLI and the improved space vector-based PWM strategy considering the switching frequency of power devices, that minimizes the fluctuation of the neutral point current in spite of high modulation index region and low power factor. It contributes to decrease the capacitance of dc-link capacitor bank and to increase the neutral point voltage controllable region. Especially, even if second (or even) order harmonic is induced in load current (at this situation, is was investigated that the general control method can not suppress the neutral point voltage variation), this PWM can provide effective control method to suppress the neutral point voltage variation. Various simulation results by means of Matlab/Simulation are presented to verify the proposed PWM.

• Journal of Power Electronics
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• v.17 no.6
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• pp.1500-1511
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• 2017

The purpose of this paper is to study a high-performance control scheme for neutral-point-clamping three-level (NPC-3L) inverter fed dual three-phase permanent magnet synchronous motor (PMSM) drives by considering some asymmetric factors such as the non-identical parameters in phase windings. To implement this, the system model is analyzed for dual three-phase PMSM drives with asymmetric factors based on the vector space decomposition (VSD) principle. Based on the equivalent circuits, PI controllers with feedforward compensation are used in the d-q subspace for regulating torque, where the cut-off frequency of the PI controllers are set at the twice the fundamental frequency for compensating both the additional DC component and the second order component caused by asymmetry. Meanwhile, proportional resonant (PR) controllers are proposed in the x-y subspace for suppressing the possible unbalanced currents in the phase windings. A dual three-phase space vector modulation (DT-SVM) is designed for the drive, and the balancing factor is designed based on the numerical fitting surface for balancing the DC link capacitor voltages. Experimental results are given to demonstrate the validity of the theoretical analysis and the proposed control scheme.

• Journal of Power Electronics
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• v.15 no.5
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• pp.1264-1273
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• 2015

An inverter output power control based power factor correction (PFC) strategy is being extensively used for permanent magnet synchronous motor (PMSM) drives in appliances because such a strategy can considerably reduce the cost and size of the inverter. In this strategy, PFC circuits are removed and large electrolytic DC-link capacitors are replaced with small film capacitors. In this application, the PMSM d-q axes currents are controlled to produce ripples, the frequency of which is twice that of the AC main voltage, to obtain a high power factor at the AC mains. This process indicates that the PMSM operates under periodic magnetic saturation conditions. This paper proposes a back electromotive-force (back-EMF) estimator for the high-speed sensorless control of PMSM operating under periodic magnetic saturation conditions. The transfer function of the back-EMF estimator is analyzed to examine the effect of the periodic magnetic saturation on the accuracy of the estimated rotor position. A simple compensation method for the estimated position errors caused by the periodic magnetic saturation is also proposed in this paper. The effectiveness of the proposed method is experimentally verified with the use of a PMSM drive for a vacuum cleaner centrifugal fan, wherein the maximum operating speed reaches 30,000 rpm.

• Journal of Power Electronics
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• v.7 no.2
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• pp.124-131
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• 2007

In this paper, a novel type of auxiliary switched capacitor assisted edge resonant soft switching PWM resonant DC-DC converter with two simple auxiliary commutation lossless inductor snubbers is presented. The operation principle of this converter is described using the switching mode equivalent circuits. This newly developed multi resonant DC-DC converter can regulate its DC output AC power under a principle of constant frequency edge-resonant soft switching commutation by an asymmetrical PWM duty cycle control scheme. The high frequency power regulation and actual power characteristics of the proposed soft switching PWM resonant DC-DC converter are evaluated and discussed. The operating performances of the newly proposed soft switching inverter are represented based on simulation results from an applications point of view.