• 제목/요약/키워드: High bandwidth memory(HBM)

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Bandwidth-aware Memory Placement on Hybrid Memories targeting High Performance Computing Systems

  • Lee, Jongmin
    • 한국컴퓨터정보학회논문지
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    • 제24권8호
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    • pp.1-8
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    • 2019
  • Modern computers provide tremendous computing capability and a large memory system. Hybrid memories consist of next generation memory devices and are adopted in high performance systems. However, the increased complexity of the microprocessor makes it difficult to operate the system effectively. In this paper, we propose a simple data migration method called Bandwidth-aware Data Migration (BDM) to efficiently use memory systems for high performance processors with hybrid memory. BDM monitors the status of applications running on the system using hardware performance monitoring tools and migrates the appropriate pages of selected applications to High Bandwidth Memory (HBM). BDM selects applications whose bandwidth usages are high and also evenly distributed among the threads. Experimental results show that BDM improves execution time by an average of 20% over baseline execution.

300 mm 웨이퍼의 전영역 TTV 측정 정밀도 향상을 위한 모듈 설계 (Design for Enhanced Precision in 300 mm Wafer Full-Field TTV Measurement)

  • 정안목;이학준
    • 마이크로전자및패키징학회지
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    • 제30권3호
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    • pp.88-93
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    • 2023
  • 고대역폭 메모리(HBM)에 대한 수요가 증가하고 직경이 더 큰 웨이퍼의 핸들링 기술이 발전함에 따라 본딩 웨이퍼의 두께 균일성에 대해 신뢰성을 확보할 수 있는 측정 방법이 요구되고 있다. 본 연구에서는 300mm 웨이퍼를 대상으로 웨이퍼의 전 영역에 대해 TTV를 측정할 수 있는 모듈을 설계 제직하고, 측정 모듈의 설계를 바탕으로 발생할 수 있는 측정 오차를 분석하였으며, 웨이퍼의 처짐과 척의 기구적 오차를 고려한 모델 해석을 통해 예측된 기울기 값에 따른 측정 오차를 추정하였다. TTV 측정 모듈은 웨이퍼 지지를 위한 센터 척과 리프트 핀을 활용하여 웨이퍼의 전체 영역에 대해 측정이 가능하도록 하였다. 모달 해석을 통해 모듈의 구조적 안정성을 예측하였으며, 구동부와 측정부 모두 100Hz 이상의 강성을 갖는 것을 확인하였다. 설계된 모듈의 측정 오차를 예측한 결과 두께 1,500um의 본딩 웨이퍼를 측정할 경우 예측된 측정 오차는 1.34nm로 나타났다.

저온 및 고전류밀도 조건에서 전기도금된 구리 박막 간의 열-압착 직접 접합 (Thermal Compression of Copper-to-Copper Direct Bonding by Copper films Electrodeposited at Low Temperature and High Current Density)

  • 이채린;이진현;박기문;유봉영
    • 한국표면공학회:학술대회논문집
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    • 한국표면공학회 2018년도 춘계학술대회 논문집
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    • pp.102-102
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    • 2018
  • Electronic industry had required the finer size and the higher performance of the device. Therefore, 3-D die stacking technology such as TSV (through silicon via) and micro-bump had been used. Moreover, by the development of the 3-D die stacking technology, 3-D structure such as chip to chip (c2c) and chip to wafer (c2w) had become practicable. These technologies led to the appearance of HBM (high bandwidth memory). HBM was type of the memory, which is composed of several stacked layers of the memory chips. Each memory chips were connected by TSV and micro-bump. Thus, HBM had lower RC delay and higher performance of data processing than the conventional memory. Moreover, due to the development of the IT industry such as, AI (artificial intelligence), IOT (internet of things), and VR (virtual reality), the lower pitch size and the higher density were required to micro-electronics. Particularly, to obtain the fine pitch, some of the method such as copper pillar, nickel diffusion barrier, and tin-silver or tin-silver-copper based bump had been utillized. TCB (thermal compression bonding) and reflow process (thermal aging) were conventional method to bond between tin-silver or tin-silver-copper caps in the temperature range of 200 to 300 degrees. However, because of tin overflow which caused by higher operating temperature than melting point of Tin ($232^{\circ}C$), there would be the danger of bump bridge failure in fine-pitch bonding. Furthermore, regulating the phase of IMC (intermetallic compound) which was located between nickel diffusion barrier and bump, had a lot of problems. For example, an excess of kirkendall void which provides site of brittle fracture occurs at IMC layer after reflow process. The essential solution to reduce the difficulty of bump bonding process is copper to copper direct bonding below $300^{\circ}C$. In this study, in order to improve the problem of bump bonding process, copper to copper direct bonding was performed below $300^{\circ}C$. The driving force of bonding was the self-annealing properties of electrodeposited Cu with high defect density. The self-annealing property originated in high defect density and non-equilibrium grain boundaries at the triple junction. The electrodeposited Cu at high current density and low bath temperature was fabricated by electroplating on copper deposited silicon wafer. The copper-copper bonding experiments was conducted using thermal pressing machine. The condition of investigation such as thermal parameter and pressure parameter were varied to acquire proper bonded specimens. The bonded interface was characterized by SEM (scanning electron microscope) and OM (optical microscope). The density of grain boundary and defects were examined by TEM (transmission electron microscopy).

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