• Title/Summary/Keyword: High Performance DSP

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An Iterative Data-Flow Optimal Scheduling Algorithm based on Genetic Algorithm for High-Performance Multiprocessor (고성능 멀티프로세서를 위한 유전 알고리즘 기반의 반복 데이터흐름 최적화 스케줄링 알고리즘)

  • Chang, Jeong-Uk;Lin, Chi-Ho
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.15 no.6
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    • pp.115-121
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    • 2015
  • In this paper, we proposed an iterative data-flow optimal scheduling algorithm based on genetic algorithm for high-performance multiprocessor. The basic hardware model can be extended to include detailed features of the multiprocessor architecture. This is illustrated by implementing a hardware model that requires routing the data transfers over a communication network with a limited capacity. The scheduling method consists of three layers. In the top layer a genetic algorithm takes care of the optimization. It generates different permutations of operations, that are passed on to the middle layer. The global scheduling makes the main scheduling decisions based on a permutation of operations. Details of the hardware model are not considered in this layer. This is done in the bottom layer by the black-box scheduling. It completes the scheduling of an operation and ensures that the detailed hardware model is obeyed. Both scheduling method can insert cycles in the schedule to ensure that a valid schedule is always found quickly. In order to test the performance of the scheduling method, the results of benchmark of the five filters show that the scheduling method is able to find good quality schedules in reasonable time.

Implementation of the Integrated Navigation Parameter Extraction from the Aerial Image Sequence Using TMS320C80 MVP (TMS320C80 MVP 상에서의 연속항공영상으리 이용한 통합 항법 변수 추출 시스템 구현)

  • Sin, Sang-Yun;Park, In-Jun;Lee, Yeong-Sam;Lee, Min-Gyu;Kim, Gwan-Seok;Jeong, Dong-Uk;Kim, In-Cheol;Park, Rae-Hong;Lee, Sang-Uk
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.39 no.3
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    • pp.49-57
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    • 2002
  • In this paper, we deal with a real time implementation of the integrated image-based navigation parameter extraction system using the TMS320C80 MVP(multimedia video processor). Our system consists of relative position estimation and absolute position compensation, which is further divided into high-resolution aerial image matching, DEM(Digital elevation model) matching, and IRS (Indian remote sensing) satellite image matching. Those algorithms are implemented in real time using the MVP. To achieve a real-time operation, an attempt is made to partition the aerial image and process the partitioned images in parallel using the four parallel processors in the MVP. We also examine the performance of the implemented integrated system in terms of the estimation accuracy, confirming a proper operation of the our system.

Implementation of a backend system for real-time intravascular ultrasound imaging (실시간 혈관내초음파 영상을 위한 후단부 시스템 구현)

  • Park, Jun-Won;Moon, Ju-Young;Lee, Junsu;Chang, Jin Ho
    • The Journal of the Acoustical Society of Korea
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    • v.37 no.4
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    • pp.215-222
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    • 2018
  • This paper reports the development and performance evaluation of a backend system for real-time IVUS (Intravascular Ultrasound) imaging. The developed backend system was designed to minimize the amount of logic and memory usage by means of efficient LUTs (Look-up Tables), and it was implemented in a single FPGA (Field Programmable Gate Array) without using external memory. This makes it possible to implement the backend system that is less expensive, smaller, and lighter. The accuracy of the backend system implemented was evaluated by comparing the output of the FPGA with the result computed using a MATLAB program implemented in the same way as the VHDL (VHSIC Hardware Description Language) code. Based on the result of ex-vivo experiment using rabbit artery, the developed backend system was found to be suitable for real-time intravascular ultrasound imaging.

Control and Analysis of an Integrated Bidirectional DC/AC and DC/DC Converters for Plug-In Hybrid Electric Vehicle Applications

  • Hegazy, Omar;Van Mierlo, Joeri;Lataire, Philippe
    • Journal of Power Electronics
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    • v.11 no.4
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    • pp.408-417
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    • 2011
  • The plug-in hybrid electric vehicles (PHEVs) are specialized hybrid electric vehicles that have the potential to obtain enough energy for average daily commuting from batteries. The PHEV battery would be recharged from the power grid at home or at work and would thus allow for a reduction in the overall fuel consumption. This paper proposes an integrated power electronics interface for PHEVs, which consists of a novel Eight-Switch Inverter (ESI) and an interleaved DC/DC converter, in order to reduce the cost, the mass and the size of the power electronics unit (PEU) with high performance at any operating mode. In the proposed configuration, a novel Eight-Switch Inverter (ESI) is able to function as a bidirectional single-phase AC/DC battery charger/ vehicle to grid (V2G) and to transfer electrical energy between the DC-link (connected to the battery) and the electric traction system as DC/AC inverter. In addition, a bidirectional-interleaved DC/DC converter with dual-loop controller is proposed for interfacing the ESI to a low-voltage battery pack in order to minimize the ripple of the battery current and to improve the efficiency of the DC system with lower inductor size. To validate the performance of the proposed configuration, the indirect field-oriented control (IFOC) based on particle swarm optimization (PSO) is proposed to optimize the efficiency of the AC drive system in PHEVs. The maximum efficiency of the motor is obtained by the evaluation of optimal rotor flux at any operating point, where the PSO is applied to evaluate the optimal flux. Moreover, an improved AC/DC controller based Proportional-Resonant Control (PRC) is proposed in order to reduce the THD of the input current in charger/V2G modes. The proposed configuration is analyzed and its performance is validated using simulated results obtained in MATLAB/ SIMULINK. Furthermore, it is experimentally validated with results obtained from the prototypes that have been developed and built in the laboratory based on TMS320F2808 DSP.

Precision Speed Control of PMSM Using Disturbance Observer and Parameter Compensator (외란관측기와 파라미터 보상기를 이용한 PMSM의 정밀속도제어)

  • 고종선;이택호;김칠환;이상설
    • The Transactions of the Korean Institute of Power Electronics
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    • v.6 no.1
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    • pp.98-106
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    • 2001
  • This paper presents external load disturbance compensation that used to deadbeat load torque observer and regulation of the compensation gain by parameter estimator. As a result, the response of PMSM follows that of the nominal plant. The load torque compensation method is compose of a dead beat observer that is well-known method. However it has disadvantage such as a noise amplification effect. To reduce of the effect, the post-filter, which is implemented by MA process, is proposed. The parameter compensator with RLSM(recursive least square method) parameter estimator is suggested to increase the performance of the load torque observer and main controller. Although RLSM estimator is one of the most effective methods for online parameter identification, it is difficult to obtain unbiased result in this application. It is caused by disturbed dynamic model with external torque. The proposed RLSM estimator is combined with a high performance torque observer to resolve the problems. As a result, the proposed control system becomes a robust and precise system against the load torque and the parameter variation. A stability and usefulness, through the verified computer simulation and experiment, are shown in this paper.

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Modeling of Sensorineural Hearing Loss for the Evaluation of Digital Hearing Aid Algorithms (디지털 보청기 알고리즘 평가를 위한 감음신경성 난청의 모델링)

  • 김동욱;박영철
    • Journal of Biomedical Engineering Research
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    • v.19 no.1
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    • pp.59-68
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    • 1998
  • Digital hearing aids offer many advantages over conventional analog hearing aids. With the advent of high speed digital signal processing chips, new digital techniques have been introduced to digital hearing aids. In addition, the evaluation of new ideas in hearing aids is necessarily accompanied by intensive subject-based clinical tests which requires much time and cost. In this paper, we present an objective method to evaluate and predict the performance of hearing aid systems without the help of such subject-based tests. In the hearing impairment simulation(HIS) algorithm, a sensorineural hearing impairment medel is established from auditory test data of the impaired subject being simulated. Also, the nonlinear behavior of the loudness recruitment is defined using hearing loss functions generated from the measurements. To transform the natural input sound into the impaired one, a frequency sampling filter is designed. The filter is continuously refreshed with the level-dependent frequency response function provided by the impairment model. To assess the performance, the HIS algorithm was implemented in real-time using a floating-point DSP. Signals processed with the real-time system were presented to normal subjects and their auditory data modified by the system was measured. The sensorineural hearing impairment was simulated and tested. The threshold of hearing and the speech discrimination tests exhibited the efficiency of the system in its use for the hearing impairment simulation. Using the HIS system we evaluated three typical hearing aid algorithms.

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