• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 제39회 하계학술대회
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• pp.879-880
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• 2008

At the high speed operation, the boost negative bias can reduce the negative torque and increase the dwell angle, so the output power and efficiency can be improved. In this paper, a novel power converter for single phase SRM with boost negative bias is proposed. A simple passive capacitor circuit is added in the front-end, which consists of three diodes and one capacitor. Based on this passive capacitor network, the two capacitors can be connected in series and parallel in different condition. In proposed converter, the phase winding of SRM obtains general dc-link voltage in excitation mode and the double dc-link voltage in demagnetization mode. The operation modes of the proposed converter are analyzed in detail. Some computer simulation and experimental results are done to verify the performance of proposed converter.

• 전기학회논문지
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• 제58권8호
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• pp.1519-1525
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• 2009

This paper presents a novel passive converter for single phase SRM. The proposed passive converter has additional passive power circuit which is consisted by three diodes and one capacitor in the front-end of conventional asymmetric converter to supply a high negative bias during demagnetization. The high negative bias can reduce the demagnetization time and negative torque from tail current in single phase SRM. So, It can extend positive torque region by the extended turn-off position. In this paper, the structure and operating modes of a novel passive converter are introduced with mathematical model. The proposed single phase SRM using passive converter is verified by the computer simulation and experimental results.

• 한국전기전자재료학회논문지
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• 제17권5호
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• pp.530-535
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• 2004

We have studied 90$^{\circ}$ twisted nematic mode switching by fringe electric field(F-TN mode) using a liquid crystal (LC) with negative dielectric anisotropy. In the device, two polarizers are parallel each other, electrodes exist only on bottom substrate, and one of rubbing direction is coincident with polarizer axis. Therefore, the cell shows a black state before a voltage is applied. With a bias voltage generating fringe-electric field, the LC twists perpendicular to fringe electric field such that the LCs are almost homogeneously aligned except near the bottom surface since the negative type of the LC is used. Consequently, the new device exhibits much wider viewing angle than that of the conventional TN mode due to in-plane switching and relatively high transmittance since the LC director above whole electrode area aligns parallel to the polarizer axis.

• Journal of Electrical Engineering and Technology
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• 제6권4호
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• pp.505-512
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• 2011

A novel passive boost power converter forsingle-phaseswitched reluctance motor is presented. A simple passive circuit is proposed comprisingthree diodes and one capacitor. The passive circuitis added in the front-end of a conventional asymmetric converter to obtain high negative bias. Based on this passive network, the terminal voltage of the converter side is a general DC-link voltage level in parallel mode up to a double DC-link voltage level in series mode. Thus,it can suppress the negative torque generation from the tail current and improve the output power. The results of the comparative simulation and experiments forthe conventional and proposed converter verify the performance of the proposed converter.

• 한국전자파학회논문지
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• 제29권10호
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• pp.766-772
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• 2018

본 논문에서는 InGaAs enhancement mode $0.15{\mu}m$ pHEMT를 이용하여 6~10 GHz 대역에서 동작하는 wide-band 전력증폭기를 설계하였다. Enhancement 소자는 gate 바이어스를 양전압으로 사용하며, 음전압을 위한 추가회로 구성이 없어지며 모듈의 크기를 줄일 수 있다. 또한, 본 설계에서는 3D-EM(electromagnetic) 시뮬레이션을 통해 패키지 본드와이어의 인덕턴스 및 기판 손실을 예측하여 설계하였다. 광대역을 위해 lossy matching을 사용하고, 전력, 효율 관점에서 최적의 바이어스를 선정하여 설계하였다. 제안한 전력증폭기의 패키지 칩은 6~10 GHz 대역에서 20 dB 이상의 평탄 이득, 8 dB 이상의 입출력 반사손실, 출력전력은 27 dBm 이상, 전력부가효율은 35 % 이상으로 측정되었다.

• Journal of electromagnetic engineering and science
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• 제17권2호
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• pp.105-107
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• 2017

The self-biasing circuit through a feedback resistor is applied to a gallium nitride (GaN) distributed power amplifier (PA) monolithic microwave circuit (MMIC). The self-biasing circuit is a useful scheme for biasing depletion-mode compound semiconductor devices with a negative gate bias voltage, and is widely used for common source amplifiers. However, the self-biasing circuit is rarely used for PAs, because the large DC power dissipation of the feedback resistor results in the degradation of output power and power efficiency. In this study, the feasibility of applying a self-biasing circuit through a feedback resistor to a GaN PA MMIC is examined by using the high operation voltage of GaN high-electron mobility transistors. The measured results of the proposed GaN PA are the average output power of 41.1 dBm and the average power added efficiency of 12.2% over the 6-16 GHz band.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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• pp.155.2-155.2
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• 2013

Strain-relaxed SiGe layer on Si substrate has numerous potential applications for electronic and opto- electronic devices. SiGe layer must have a high degree of strain relaxation and a low dislocation density. Conventionally, strain-relaxed SiGe on Si has been manufactured using compositionally graded buffers, in which very thick SiGe buffers of several micrometers are grown on a Si substrate with Ge composition increasing from the Si substrate to the surface. In this study, a new plasma process, i.e., the combination of PIII&D and HiPIMS, was adopted to implant Ge ions into Si wafer for direct formation of SiGe layer on Si substrate. Due to the high peak power density applied the Ge sputtering target during HiPIMS operation, a large fraction of sputtered Ge atoms is ionized. If the negative high voltage pulse applied to the sample stage in PIII&D system is synchronized with the pulsed Ge plasma, the ion implantation of Ge ions can be successfully accomplished. The PIII&D system for Ge ion implantation on Si (100) substrate was equipped with 3'-magnetron sputtering guns with Ge and Si target, which were operated with a HiPIMS pulsed-DC power supply. The sample stage with Si substrate was pulse-biased using a separate hard-tube pulser. During the implantation operation, HiPIMS pulse and substrate's negative bias pulse were synchronized at the same frequency of 50 Hz. The pulse voltage applied to the Ge sputtering target was -1200 V and the pulse width was 80 usec. While operating the Ge sputtering gun in HiPIMS mode, a pulse bias of -50 kV was applied to the Si substrate. The pulse width was 50 usec with a 30 usec delay time with respect to the HiPIMS pulse. Ge ion implantation process was performed for 30 min. to achieve approximately 20 % of Ge concentration in Si substrate. Right after Ge ion implantation, ~50 nm thick Si capping layer was deposited to prevent oxidation during subsequent RTA process at $1000^{\circ}C$ in N2 environment. The Ge-implanted Si samples were analyzed using Auger electron spectroscopy, High-resolution X-ray diffractometer, Raman spectroscopy, and Transmission electron microscopy to investigate the depth distribution, the degree of strain relaxation, and the crystalline structure, respectively. The analysis results showed that a strain-relaxed SiGe layer of ~100 nm thickness could be effectively formed on Si substrate by direct Ge ion implantation using the newly-developed PIII&D process for non-gaseous elements.

• 전력전자학회논문지
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• 제20권3호
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• pp.214-222
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• 2015

The superiority of gallium nitride FET (GaN FET) over silicon MOSFET is examined in this paper. One of the outstanding features of GaN FET is low reverse-recovery charge, which enables continuous conduction mode operation of totem-pole bridgeless boost power factor correction (PFC) circuit. Among many bridgeless topologies, totem-pole bridgeless shows high efficiency and low conducted electromagnetic interference performance, with low cost and simple control scheme. The operation principle, control scheme, and circuit implementation of the proposed topology are provided. The converter is driven in two-module interleaved topology to operate at a power level of 5.5 kW, whereas phase-shedding control is adopted for light load efficiency improvement. Negative bias circuit is used in gate drivers to avoid the shoot-through induced by high speed switching. The superiority of GaN FET is verified by constructing a 5.5 kW prototype of two-module interleaved totem-pole bridgeless boost PFC converter. The experiment results show the highest efficiency of 98.7% at 1.6 kW load and an efficiency of 97.7% at the rated load.

• 한국표면공학회지
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• 제36권4호
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• pp.296-300
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• 2003

Extended cylindrical magnetron sputtering system with rotating 600-mm long and 90-mm diameter graphite cathode and pulsed power supply voltage generator were developed and fabricated. Time-dependent Langmuir probe characteristics as well as carbon films thickness were measured. It was shown that ratio of ions flux to carbon atoms flux for pulsed magnetron discharge mode was equal to $\Phi_{i}$ $\Phi$sub C/ = 0.2. It did not depend on the discharge current in the range of $I_{d}$ / = 10∼60 A since both the plasma density and the film deposition rate were found approximately proportional to the discharge current. In spite of this fact carbon film structure was found to be strongly dependent on the discharge current. Grain size increased from 100 nm at $I_{d}$ = 10∼20 A to 500 nm at $I_{d}$ = 40∼60 A. To deposit fine-grained hard nanocrystalline or amorphous carbon coating current regime with $I_{d}$ = 20 A was chosen. Pulsed negative bias voltage ($\tau$= 40 ${\mu}\textrm{s}$, $U_{b}$ = 0∼10 ㎸) synchronized with magnetron discharge pulses was applied to a substrate and voltage of $U_{b}$ = 3.4 ㎸ was shown to be optimum for a hard carbon film deposition. Lower voltages were not sufficient for amorphization of a growing graphite film, while higher voltages led to excessive ion bombardment and effects of recrystalization and graphitization.

• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2000년도 추계학술발표회 초록집
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• pp.3-4
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• 2000

Many researchers are interested in the synthesis and characterization of carbon nitride and diamond-like carbon (DLq because they show excellent mechanical properties such as low friction and high wear resistance and excellent electrical properties such as controllable electical resistivity and good field electron emission. We have deposited amorphous carbon nitride (a-C:N) thin films and DLC thin films by shielded arc ion plating (SAIP) and evaluated the structural and tribological properties. The application of appropriate negative bias on substrates is effective to increase the film hardness and wear resistance. This paper reports on the deposition and tribological OLC films in relation to the substrate bias voltage (Vs). films are compared with those of the OLC films. A high purity sintered graphite target was mounted on a cathode as a carbon source. Nitrogen or argon was introduced into a deposition chamber through each mass flow controller. After the initiation of an arc plasma at 60 A and 1 Pa, the target surface was heated and evaporated by the plasma. Carbon atoms and clusters evaporated from the target were ionized partially and reacted with activated nitrogen species, and a carbon nitride film was deposited onto a Si (100) substrate when we used nitrogen as a reactant gas. The surface of the growing film also reacted with activated nitrogen species. Carbon macropartic1es (0.1 -100 maicro-m) evaporated from the target at the same time were not ionized and did not react fully with nitrogen species. These macroparticles interfered with the formation of the carbon nitride film. Therefore we set a shielding plate made of stainless steel between the target and the substrate to trap the macropartic1es. This shielding method is very effective to prepare smooth a-CN films. We, therefore, call this method "shielded arc ion plating (SAIP)". For the deposition of DLC films we used argon instead of nitrogen. Films of about 150 nm in thickness were deposited onto Si substrates. Their structures, chemical compositions and chemical bonding states were analyzed by using X-ray diffraction, Raman spectroscopy, X-ray photoelectron spectroscopy and infrared spectroscopy. Hardness of the films was measured with a nanointender interfaced with an atomic force microscope (AFM). A Berkovich-type diamond tip whose radius was less than 100 nm was used for the measurement. A force-displacement curve of each film was measured at a peak load force of 250 maicro-N. Load, hold and unload times for each indentation were 2.5, 0 and 2.5 s, respectively. Hardness of each film was determined from five force-displacement curves. Wear resistance of the films was analyzed as follows. First, each film surface was scanned with the diamond tip at a constant load force of 20 maicro-N. The tip scanning was repeated 30 times in a 1 urn-square region with 512 lines at a scanning rate of 2 um/ s. After this tip-scanning, the film surface was observed in the AFM mode at a constant force of 5 maicro-N with the same Berkovich-type tip. The hardness of a-CN films was less dependent on Vs. The hardness of the film deposited at Vs=O V in a nitrogen plasma was about 10 GPa and almost similar to that of Si. It slightly increased to 12 - 15 GPa when a bias voltage of -100 - -500 V was applied to the substrate with showing its maximum at Vs=-300 V. The film deposited at Vs=O V was least wear resistant which was consistent with its lowest hardness. The biased films became more wear resistant. Particularly the film deposited at Vs=-300 V showed remarkable wear resistance. Its wear depth was too shallow to be measured with AFM. On the other hand, the DLC film, deposited at Vs=-l00 V in an argon plasma, whose hardness was 35 GPa was obviously worn under the same wear test conditions. The a-C:N films show higher wear resistance than DLC films and are useful for wear resistant coatings on various mechanical and electronic parts.nic parts.