• Title/Summary/Keyword: High Breakdown voltage

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Optimization of highly scalable gate dielectrics by stacking Ta2O5 and SiO2 thin films for advanced MOSFET technology

  • Kim, Tae-Wan;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.259-259
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    • 2016
  • 반도체 산업 전반에 걸쳐 이루어지고 있는 연구는 소자를 더 작게 만들면서도 구동능력은 우수한 소자를 만들어내는 것이라고 할 수 있다. 따라서 소자의 미세화와 함께 트랜지스터의 구동능력의 향상을 위한 기술개발에 대한 필요성이 점차 커지고 있으며, 고유전(high-k)재료를 트랜지스터의 게이트 절연막으로 이용하는 방법이 개발되고 있다. High-k 재료를 트랜지스터의 게이트 절연막에 적용하면 낮은 전압으로 소자를 구동할 수 있어서 소비전력이 감소하고 소자의 미세화 측면에서도 매우 유리하다. 그러나, 초미세화된 소자를 제작하기 위하여 high-k 절연막의 두께를 줄이게 되면, 전기적 용량(capacitance)은 커지지만 에너지 밴드 오프셋(band-offset)이 기존의 실리콘 산화막(SiO2)보다 작고 또한 열공정에 의해 쉽게 결정화가 이루어지기 때문에 누설전류가 발생하여 소자의 열화를 초래할 수 있다. 따라서, 최근에는 이러한 문제를 해결하기 위하여 게이트 절연막 엔지니어링을 통해서 누설전류를 줄이면서 전기적 용량을 확보할 수 있는 연구가 주목받고 있다. 본 실험에서는 high-k 물질인 Ta2O5와 SiO2를 적층시켜서 누설전류를 줄이면서 동시에 높은 캐패시턴스를 달성할 수 있는 게이트 절연막 엔지니어링에 대한 연구를 진행하였다. 먼저 n-type Si 기판을 표준 RCA 세정한 다음, RF sputter를 사용하여 두께가 Ta2O5/SiO2 = 50/0, 50/5, 50/10, 25/10, 25/5 nm인 적층구조의 게이트 절연막을 형성하였다. 다음으로 Al 게이트 전극을 150 nm의 두께로 증착한 다음, 전기적 특성 개선을 위하여 furnace N2 분위기에서 $400^{\circ}C$로 30분간 후속 열처리를 진행하여 MOS capacitor 소자를 제작하였고, I-V 및 C-V 측정을 통하여 형성된 게이트 절연막의 전기적 특성을 평가하였다. 그 결과, Ta2O5/SiO2 = 50/0, 50/5, 50/10 nm인 게이트 절연막들은 누설전류는 낮지만, 큰 용량을 얻을 수 없었다. 한편, Ta2O5/SiO2 = 25/10, 25/5 nm의 조합에서는 충분한 용량을 확보할 수 있었다. 적층된 게이트 절연막의 유전상수는 25/5 nm, 25/10 nm 각각 8.3, 7.6으로 비슷하였지만, 문턱치 전압(VTH)은 각각 -0.64 V, -0.18 V로 25/10 nm가 0 V에 보다 근접한 값을 나타내었다. 한편, 누설전류는 25/10 nm가 25/5 nm보다 약 20 nA (@5 V) 낮은 것을 확인할 수 있었으며 절연파괴전압(breakdown voltage)도 증가한 것을 확인하였다. 결론적으로 Ta2O5/SiO2 적층 절연막의 두께가 25nm/10nm에서 최적의 특성을 얻을 수 있었으며, 본 실험과 같이 게이트 절연막 엔지니어링을 통하여 효과적으로 누설전류를 줄이고 게이트 용량을 증가시킴으로써 고집적화된 소자의 제작에 유용한 기술로 기대된다.

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A Study on High-Power Handling Capability of X-Band Circular Waveguide Cavity Filter (X-대역 원통형 도파관 캐비티 필터의 고전력 핸들링 능력 연구)

  • Lee, Sun-Ik;Kim, Joong-Pyo;Lim, Won-Gyu;Kim, Sang-Goo;Lee, Pil-Yong;Jang, Jin-Baek
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.1
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    • pp.49-60
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    • 2017
  • In this paper, we presented the result of the study on high-power handling capability of the X-band circular waveguide cavity filter configured at the output of high power amplifier(120 W) for geostationary satellites. The dual mode circular waveguide cavity filter with 6th order is selected and the physical model of the filter is designed after determination of the size of resonator from mode chart. Multipactor margin analysis is performed by the SEM method and the VMF method. The result shows that the VMF method predicts lower multipactor breakdown thresholds than the SEM method. Evaluating the multipactor margin obtained by the VMF method to ECSS criteria, we could decide to perform multipactor test. The multipactor test conducted in ESA facility shows that multipactor did not occur even until the RF power increased up to 540 W. In consequence, by both analysis and test, we could verify that the X-band circular waveguide cavity filter has the sufficient high-power handling capability to operate on orbit.

Study on Condition of Fabrication Processing for R. F. High-power Unit Capacitor and Electrical Characteristics According to Addition of ZrO2 (고주파용 대용량 단위 유전체 제조공정과 ZrO2 첨가에 따른 전기적 특성 연구)

  • Ahn, Young-Soo;Kim, Joon-Soo;Park, Joo-Seok;Kim, Hong-Soo;Han, Moon-Hee;No, Kwang-Soo
    • Journal of the Korean Ceramic Society
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    • v.39 no.9
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    • pp.822-828
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    • 2002
  • Fabrication and electrical characterization of R. F. High-power unit capacitors were investigated to study on condition of fabrication processing for R. F. High-power unit capacitor and electrical characteristics according to addition of $ZrO_2$. The unit capacitors were fabricated using tape casting. The optimum mixture ratio of dielectrics and mixing binder for the slurry fabrication was 57.5∼60.0: 42.5∼40.0 wt%. The slurry viscosity was 4000∼5000 cps and casting state of green tape fabricated using these slurry was excellent. Optimum stacking was made by 200 kg/$cm^2$ pressure with 80$^{\circ}C$ heating. $ZrO_2$ was added to improve the electrical characteristics of unit capacitor, especially breakdown characteristics. The dielectric constant and loss factor of the unit condenser having different $ZrO_2$ amounts was not changed in the addition range of 1 to 5 wt%. Also, dielectric constant was not changed in the frequency range of 10 to 500 kHz. It was found that characteristics of resistance voltage was improved through the formation of $CaZrO_3$ and the reduction of particle size as about 3wt% $ZrO_2$ was added.

Influence of Polarization Behaviors on the ECM Characteristics of SnPb Solder Alloys in PCB (PCB에서의 ECM 특성에 미치는 SnPb 솔더 합금의 분극거동의 영향)

  • Lee Shin-Bok;Yoo Young-Ran;Jung Ja-Young;Park Young-Bae;Kim Young-Sik;Joo Young-Chang
    • Journal of the Microelectronics and Packaging Society
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    • v.12 no.2 s.35
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    • pp.167-174
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    • 2005
  • Smaller size and higher integration of electronic components make smaller gap between metal conducting layers in electronic package. Under harsh environmental conditions (high temperature/humidity), electronic component respond to applied voltages by electrochemically ionization of metal and metal filament formation, which lead to short failure and this phenomenon is termed electrochemical migration(ECM). In this work, printed circuit board(PCB) is used for determination of ECM characteristics. Copper leads of PCB are soldered by eutectic solder alloys. Insulation breakdown time is measured at $85^{\circ}C,\;85{\%}RH$. CAF is the main mechanism of ECM at PCB. Pb is more susceptible to CAF rather than Sn, which corresponds well to the corrosion resistance of solder materials in aqueous environment. Polarization tests in chloride or chloride-free solutions fur pure metal and eutectic solder alloys are performed to understand ECM characteristics. Lifetime results show well defined log-normal distribution which resulted in biased voltage factor(n=2) by voltage scaling. Details on migration mechanism and lifetime statistics will be presented and discussed.

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Electrical characteristics of Au and Pt diffused silicon $p^{+}-n$ Junction diode (Au와 Pt 확산에 의한 실리콘 $p^{+}-n$ 접합 스위칭다이오드의 전기적 특성)

  • Chung, Kee-Bock;Lee, Jae-Gon;Choi, Sie-Young
    • Journal of Sensor Science and Technology
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    • v.5 no.3
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    • pp.101-108
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    • 1996
  • The silicon $p^{+}-n$ junction diodes were fabricated. The fabricated wafers were treated by single or double annealing steps. Single annealing process was performed by diffusion of either Au or Pt into the wafer under the oxygen or nitrogen ambient at $800{\sim}1010^{\circ}C$. Second annealing step involved additional annealing of the single annealed wafer under the oxygen ambient at $800{\sim}1010^{\circ}C$ for one hour. Electrical characteristics of the diodes were investigated to evaluate the effect of the annealing treatments. In the case of single annealing under nitrogen ambient at $1010^{\circ}C$ for one hour, the amount of leakage current of Pt diffused diode was 75 times larger than that of Au diffused one. The optimum processing condition to achieve high speed silicon $p^{+}-n$ junction diodes from this study was obtained when Pt diffused wafer(treated under the nitrogen ambient at $1010^{\circ}C$ for one hour) was secondly annealed in an oxygen ambient at $800^{\circ}C$ for one hour. The resulting leakage current of two step annealed diodes were remarkably reduced to 1/1100 of the single annealed one. The diode characteristics such as recovery time, breakdown voltage, leakage current, and forward voltage were 4ns, 138V, 1.72nA, and 1V, respectively.

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Electrical Characterization of Lateral NiO/Ga2O3 FETs with Heterojunction Gate Structure (이종접합 Gate 구조를 갖는 수평형 NiO/Ga2O3 FET의 전기적 특성 연구)

  • Geon-Hee Lee;Soo-Young Moon;Hyung-Jin Lee;Myeong-Cheol Shin;Ye-Jin Kim;Ga-Yeon Jeon;Jong-Min Oh;Weon-Ho Shin;Min-Kyung Kim;Cheol-Hwan Park;Sang-Mo Koo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.36 no.4
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    • pp.413-417
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    • 2023
  • Gallium Oxide (Ga2O3) is preferred as a material for next generation power semiconductors. The Ga2O3 should solve the disadvantages of low thermal resistance characteristics and difficulty in forming an inversion layer through p-type ion implantation. However, Ga2O3 is difficult to inject p-type ions, so it is being studied in a heterojunction structure using p-type oxides, such as NiO, SnO, and Cu2O. Research the lateral-type FET structure of NiO/Ga2O3 heterojunction under the Gate contact using the Sentaurus TCAD simulation. At this time, the VG-ID and VD-ID curves were identified by the thickness of the Epi-region (channel) and the doping concentration of NiO of 1×1017 to 1×1019 cm-3. The increase in Epi region thickness has a lower threshold voltage from -4.4 V to -9.3 V at ID = 1×10-8 mA/mm, as current does not flow only when the depletion of the PN junction extends to the Epi/Sub interface. As an increase of NiO doping concentration, increases the depletion area in Ga2O3 region and a high electric field distribution on PN junction, and thus the breakdown voltage increases from 512 V to 636 V at ID =1×10-3 A/mm.

An Electrical Properties Analysis of CMOS IC by Narrow-Band High-Power Electromagnetic Wave (협대역 고출력 전자기파에 의한 CMOS IC의 전기적 특성 분석)

  • Park, Jin-Wook;Huh, Chang-Su;Seo, Chang-Su;Lee, Sung-Woo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.30 no.9
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    • pp.535-540
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    • 2017
  • The changes in the electrical characteristics of CMOS ICs due to coupling with a narrow-band electromagnetic wave were analyzed in this study. A magnetron (3 kW, 2.45 GHz) was used as the narrow-band electromagnetic source. The DUT was a CMOS logic IC and the gate output was in the ON state. The malfunction of the ICs was confirmed by monitoring the variation of the gate output voltage. It was observed that malfunction (self-reset) and destruction of the ICs occurred as the electric field increased. To confirm the variation of electrical characteristics of the ICs due to the narrow-band electromagnetic wave, the pin-to-pin resistances (Vcc-GND, Vcc-Input1, Input1-GND) and input capacitance of the ICs were measured. The pin-to-pin resistances and input capacitance of the ICs before exposure to the narrow-band electromagnetic waves were $8.57M{\Omega}$ (Vcc-GND), $14.14M{\Omega}$ (Vcc-Input1), $18.24M{\Omega}$ (Input1-GND), and 5 pF (input capacitance). The ICs exposed to narrow-band electromagnetic waves showed mostly similar values, but some error values were observed, such as $2.5{\Omega}$, $50M{\Omega}$, or 71 pF. This is attributed to the breakdown of the pn junction when latch-up in CMOS occurred. In order to confirm surface damage of the ICs, the epoxy molding compound was removed and then studied with an optical microscope. In general, there was severe deterioration in the PCB trace. It is considered that the current density of the trace increased due to the electromagnetic wave, resulting in the deterioration of the trace. The results of this study can be applied as basic data for the analysis of the effect of narrow-band high-power electromagnetic waves on ICs.

Continuously Recycling Sterilization of Yakju(Rice Wine) Using Pulsed Electric Fields (고전장펄스를 이용한 약주의 연속 재순환 살균)

  • Kim, Su-Yeon;Mok, Chul-Kyoon;Pyun, Yu-Ryang
    • Korean Journal of Food Science and Technology
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    • v.31 no.2
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    • pp.410-415
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    • 1999
  • Yakju was sterilized with high-voltage pulses of short time of a continuous pulsed electric field (PEF) system. The initial microbial counts of Yakju were $2.2{\times}10^{5}$ CFU/mL for total aerobes. The pH, acidity and electric conductivity of Yakju were 3.82, 0.37% and 1.24 mS/cm, respectively. Yakju was treated with exponential-wave formed electric pulses of 100 Hz for $0{\sim}4000{\mu}s$ under the field strength of $20{\sim}35\;kV/cm$. The lethal effect of electric fields on microorganisms was resulted from the breakdown of the cell membrane induced by the transmembrane electric potential. The critical values of the external field for the sterilization were 16.0 kV/cm for total aerobes. Logarithmic survival rates decreased linearly at low electric field strength, but curvilinearly at high electric field strength with treatment time. The sterilization of Yakju was more largely affected by the electric field strength than by the treatment time. Any changes in pH, acidity, and the growth of microorganisms were not found in the PEF treated Yakju during the storage at both $4^{\circ}C\;and\;30^{\circ}C$.

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Spatial variation in quality of Ga2O3 single crystal grown by edge-defined film-fed growth method (EFG 방법으로 성장한 β-Ga2O3 단결정의 영역별 품질 분석)

  • Park, Su-Bin;Je, Tae-Wan;Jang, Hui-Yeon;Choi, Su-Min;Park, Mi-Seon;Jang, Yeon-Suk;Moon, Yoon-Gon;Kang, Jin-Ki;Lee, Won-Jae
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.32 no.4
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    • pp.121-127
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    • 2022
  • β-Gallium oxide (Ga2O3), an ultra-wide bandgap semiconductor, has attracted great attention due to its promising applications for high voltage power devices. The most stable phase among five different polytypes, β-Ga2O3 has the wider bandgap of 4.9 eV and higher breakdown electric field of 8 MV/cm. Furthermore, it can be grown from melt source, implying higher growth rate and lower fabrication cost than other wide bandgap semiconductors such as SiC, GaN and diamond for the power device applications. In this study, β-Ga2O3 bulk crystals were grown by the edge-defined film-fed growth (EFG) process. The growth direction and the principal surface were set to be the [010] direction and the (100) plane of the β-Ga2O3 crystal, respectively. The spectra measured by Raman an alysis could exhibit the crystal phase an d impurity dopin g in the β-Ga2O3 ingot, and the crystallinity quality and crystal direction were analyzed using high-resolution X-ray diffraction (HRXRD). The crystal quality and various properties of as-grown β-Ga2O3 ribbon was systematically analyzed in order to investigate the spatial variation in entire crystal grown by EFG method.

Effect of Firing Temperature on Microstructure and the Electrical Properties of a ZnO-based Multilayered Chip Type Varistor(MLV) (소성온도에 따른 ZnO계 적층형 칩 바리스터의 미세구조와 전기적 특성의 변화)

  • Kim, Chul-Hong;Kim, Jin-Ho
    • Journal of the Korean Ceramic Society
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    • v.39 no.3
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    • pp.286-293
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    • 2002
  • Microstructure and the electrical porperties of a ZnO-based multilayered chip-type varistor(abbreviated as MLV) with Ag/Pd(7:3) inner electrode have been studied as a function of firing of temperature. At 1100$^{\circ}$C, inner electrode layers began to show nonuniform thickness and small voids, which resulted in significant disappearance of the electrode pattern and delamination at 1100$^{\circ}$C. MLVs fired at 950$^{\circ}$C showed large degradation in leakage current, probably due to incomplete redistribution of liquid and transition metal elements in pyrochlore phase decomposition. Those fired at 1100$^{\circ}$C and above, on the other hand, revealed poor varistor characteristics and their reproductibility, which are though to stem from the deformation of inner electrode pattern, the reaction between electrode materials and ZnO-based ceramics, and the volatilization of $Bi_2O_3$. Throughout the firing temperature range of 950∼1100$^{\circ}$C, capacitance and leakage current increased while breakdown voltage and peak current decreased with the increase of firing temperature, but nonlinear coefficient and clamping ratio kept almost constant at ∼30 and 1.4, respectively. In particular, those fired between 1000$^{\circ}$C and 1050$^{\circ}$C showed stable varistor characteristics with high reproducibility. It seems that Ag/Pd(7:3) alloy is one of the electrode materials applicable to most ZnO-based MLVs incorporating with $Bi_2O_3$ when cofired up to 1050$^{\circ}$C.