• Title/Summary/Keyword: Harmonics level

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Very High Linearity of High Power Amplifier by Reduction of $2^{nd}$, $3^{rd}$ Harmonics and Predistortion of $3^{rd}$ IMD (3차 혼변조 신호의 전치왜곡과 2, 3차 고조파 억제를 통한 고선형성 고출력 전력 증폭기에 관한 연구)

  • Lee, Chong-Min;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.48 no.1
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    • pp.50-54
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    • 2011
  • In this article, the linearity of single power amplifier is improved by suppress $2^{nd}$ and $3^{rd}$ harmonics at output port of high power amplifier and by cancelling of $3^{rd}$ IMD. The matching network in order to suppress harmonics consists of metamaterial like the CRLH. The $2^{nd}$ and $3^{rd}$ harmonics are suppressed over 27 dBc, respectively. A phase of generated $3^{rd}$ IMD at output of DPA (drive power amplifier) has changed in order to offset the $3^{rd}$ IMD of HPA (high power amplifier). The harmonics of the proposed PAM suppress over 6 dB than single HPA. The PAM has a 36.98 dBm of the output power, 21.6 dB of the power gain and 29.4 % of the PAE. The harmonics is a -53 dBc about PAM. This result indicate that a harmonic level is lower 20 dB than reference power amplifier.

Approximate SHE PWM for Real-Time Control of 2-Level Inverter (3레벨 인버터의 실시간 제어를 위한 근사화 SHE PWM)

  • 박영진;홍순찬
    • The Transactions of the Korean Institute of Power Electronics
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    • v.3 no.4
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    • pp.365-374
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    • 1998
  • The SHE(Selected Harmonic Elimination) PWM scheme which eliminates specific lower order harmonics can generate h high quality output waveforms in 3-level PWM inverters. However. its application has limited since SHE switching a angles cannot be calculated on-line by a microprocessor-implemented control system. Based on off-line optimization. in which multiple SHE solutions were found and analysed for 2 to 5 switching angles per quarter in the 3-level SHE PWM pattern. this paper presents an algebraic algorithm for an ordinary microprocessor to calculate approximate SHE S switching angles on-line with such high resolution that it makes no practical difference between the accurate and the a approximate SHE switching angles. By employing the variable of the dc-link voltage Vdc' the proposed SHE PWM p pattern can ideally compensate the dc input fluctuation together with selected harmonics eliminated.

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A Multi-Stair Case Wave PWM Inverter by Complementary Transistor (상보형 트랜지스테에 희한 다단 계단파 PWN 인버터)

  • 정연택;이종수;이달해;배상준;백종현;배영호
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.39 no.2
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    • pp.157-163
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    • 1990
  • The PWM inverter investigated in this paper utilizes a bridge type current sharing reactor circuit with tow pairs of complementary transistor at each phase. The driving signals for this inverter are 3 level PWM waves of W type an M type modulation, which are obtained from a microprocessor based on the switching time data obtained by switching position calculation of triangular and sine modulation wave. The output voltage waveforms of this inverter have 5 level phase voltage and 9 level line voltage of PWM. The harmonics of the output voltage are reduced to half when it is compared with single CTI, and the occurrence of harmonics is also reduced.

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3-Phase Pseudo-Random Carrier Modulation Technique for the Acoustic Noise Reduction of the 3-Phase Multi-Level Inverter Based Motor (3상 멀티 레벨 인버터 구동 유도 전동기의 소음저감을 위한 3상 준 랜덤 캐리어 변조기법)

  • Park, J.K.;Kim, J.N.;Jung, Y.G.;Lim, Y.C.
    • Proceedings of the KIPE Conference
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    • 2005.07a
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    • pp.742-745
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    • 2005
  • This paper describes a simple pseudo-random carrier modulation technique for the acoustic noise reduction of the three phase multi-level inverter based motor drives. The proposed method generates a new pseudo-random carrier by randomly synthesizing a carrier with fixed frequency and a carrier with opposition phase. To confirm the validity of the proposed method, a 130v three-phase multi-level inverter was Implemented and tested. The experimental results show that the output line voltage and acoustic noise harmonics spectra of an inverter have broadening effect of harmonics, as only simple synthesis of fixed frequency carries.

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Analysis of Harmonics Waveform Distortion for IDC(Internet Data Center) Power System and effect of multi-Phase (집적정보통신시설 전원 고조파 분석 및 다상화 효과 고찰)

  • 서정석;이상중;이희영;박정규
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2002.11a
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    • pp.133-138
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    • 2002
  • As Information society has expanded in large scale. In order to improve the reliability and Qos(Qualify of service), domestic IDC(Internet Data Center) has adopted or will adopt the SLAs(Service Level Agreements). The power quality of internet hosting server unit, power system and UPS is very important for better internet service. Therefore, the higher reliability of power system is imperative for satisfying SLAs. This paper presents the status measurement of domestic IDCs harmonics and illustrates the reduction effect of harmonics through the multi-phase.

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Planar type high-$T_{c}$ Superconductor 11-pole Lowpass Filter for Suppression of Harmonics (고조파 억제용 고온초전도 평면형 11-극 저역통과 필터의 제작)

  • 강광용;김철수;곽민환
    • Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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    • 2002.02a
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    • pp.159-162
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    • 2002
  • The eleventh-order coupled line lowpass filter(LPF) was designed to suppress harmonics and spurious signals. The microstrip type LPF was fabricated using a high-$T_{c}$ superconductor(HTS) $YBa_{2}$$Cu_{3}$$O_{7-x}$(YBCO) thin film with the $CeO_{2}$ buffer layer which was deposited on the sapphire ($Al_{2}O_{3}$) substrate of 30 x 30 $mm^{2}$. The coupled-line type LPF was designed for 1.2 GHz of cutoff frequency with 0.01 dB of ripple level at passband. The fabricated HTS LPF shows excellent attenuation characteristics in stopband of 1.2~9.5GHz (7-attenuation poles in the stopband), and shows low insertion loss (0.2 dB) and return loss (17.1 dB) in the pass- band. These measured results match well with those obtained by the EM simulation. This clearly demonstrates that the HTS LPF can suppress harmonics and spurious signals effectively.

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Common-Mode Voltage and Current Harmonic Reduction for Five-Phase VSIs with Model Predictive Current Control

  • Vu, Huu-Cong;Lee, Hong-Hee
    • Journal of Power Electronics
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    • v.19 no.6
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    • pp.1477-1485
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    • 2019
  • This paper proposes an effective model predictive current control (MPCC) that involves using 10 virtual voltage vectors to reduce the current harmonics and common-mode voltage (CMV) for a two-level five-phase voltage source inverter (VSI). In the proposed scheme, 10 virtual voltage vectors are included to reduce the CMV and low-order current harmonics. These virtual voltage vectors are employed as the input control set for the MPCC. Among the 10 virtual voltage vectors, two are applied throughout the whole sampling period to reduce current ripples. The two selected virtual voltage vectors are based on location information of the reference voltage vector, and their duration times are calculated using a simple algorithm. This significantly reduces the computational burden. Simulation and experimental results are provided to verify the effectiveness of the proposed scheme.

A Novel Harmonic Compensation Method for the Single Phase Grid Connected Inverters (단상 계통연계 인버터를 위한 새로운 고조파 보상법)

  • Khan, Reyyan Ahmad;Ashraf, Muhammad Noman;Choi, Woojin
    • Proceedings of the KIPE Conference
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    • 2018.07a
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    • pp.144-146
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    • 2018
  • In order to meet the harmonics standards such as IEEE 519 and P1547 the output quality of a grid connected inverter should satisfy a certain level of Total Harmonic Distortion (THD) value. However, the output quality of an inverter gets degraded due to the grid voltage harmonics, the dead time effects and the nonlinearity of the switches, which all contributes to a higher THD value of the output. In order to meet the required THD value for the inverter output under the distorted grid condition the use of harmonic controller is essential. In this paper a novel feedforward harmonic compensation method is proposed in order to effectively eliminate the low order harmonics in the inverter current to the grid. In the proposed method, unlike the conventional harmonic control methods, the hamonic components are directly compensated by the feedforward terms generated by the PR controller with the grid current in the stationary frame. The proposed method is simple in implementation but powerful in eliminating the harmonics from the output. The effectiveness of proposed method is verified through the PSIM simulation and the experiments with a 5kW single phase grid connected inverter.

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An Improved Harmonic Compensation Method for a Single-Phase Grid Connected Inverter (단상 계통연계 인버터를 위한 개선된 고조파 보상법)

  • Khan, Reyyan Ahmad;Choi, Woojin
    • The Transactions of the Korean Institute of Power Electronics
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    • v.24 no.3
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    • pp.215-227
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    • 2019
  • Grid-connected inverters should satisfy a certain level of total harmonic distortion (THD) to meet harmonics standards, such as IEEE 519 and P1547. The output quality of an inverter is typically degraded due to grid voltage harmonics, dead time effects, and the device's turn-on/turn-off delay, which all contribute to increasing the THD value of the output. The use of a harmonic controller is essential to meet the required THD value for inverter output under a distorted grid condition. In this study, an improved feedforward harmonic compensation method is proposed to effectively eliminate low-order harmonics in the inverter current to the grid. In the proposed method, harmonic components are directly compensated through feedforward terms generated by the proportional resonant controller with the grid current in a stationary frame. The proposed method is simple to implement but powerful in eliminating harmonics from the output. The effectiveness of the proposed method is verified through simulation using PSIM software and experiments with a 5 kW single-phase grid-connected inverter.

A Simplified Synchronous Reference Frame for Indirect Current Controlled Three-level Inverter-based Shunt Active Power Filters

  • Hoon, Yap;Radzi, Mohd Amran Mohd;Hassan, Mohd Khair;Mailah, Nashiren Farzilah;Wahab, Noor Izzri Abdul
    • Journal of Power Electronics
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    • v.16 no.5
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    • pp.1964-1980
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    • 2016
  • This paper presents a new simplified harmonics extraction algorithm based on the synchronous reference frame (SRF) for an indirect current controlled (ICC) three-level neutral point diode clamped (NPC) inverter-based shunt active power filter (SAPF). The shunt APF is widely accepted as one of the most effective current harmonics mitigation tools due to its superior adaptability in dynamic state conditions. In its controller, the SRF algorithm which is derived based on the direct-quadrature (DQ) theory has played a significant role as a harmonics extraction algorithm due to its simple implementation features. However, it suffers from significant delays due to its dependency on a numerical filter and unnecessary computation workloads. Moreover, the algorithm is mostly implemented for the direct current controlled (DCC) based SAPF which operates based on a non-sinusoidal reference current. This degrades the mitigation performances since the DCC based operation does not possess exact information on the actual source current which suffers from switching ripples problems. Therefore, three major improvements are introduced which include the development of a mathematical based fundamental component identifier to replace the numerical filter, the removal of redundant features, and the generation of a sinusoidal reference current. The proposed algorithm is developed and evaluated in MATLAB / Simulink. A laboratory prototype utilizing a TMS320F28335 digital signal processor (DSP) is also implemented to validate effectiveness of the proposed algorithm. Both simulation and experimental results are presented. They show significant improvements in terms of total harmonic distortion (THD) and dynamic response when compared to a conventional SRF algorithm.