• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.12
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• pp.1700-1705
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• 2013

A second harmonic millimeter wave oscillator utilizing sub-harmonic injection-synchronization is presented. A 8.7GHz oscillator with MES-FET is designed, and is driven as a harmonic output oscillator at 17.4GHz by means of sub-harmonic injection-synchronization. The oscillator operates as a multiplier as well as a oscillator in this scheme. Adopting this method, a high sable, high frequency millimeter wave source is obtainable even though self-oscillating frequency of an oscillator is relatively low. The range of injection-synchronization is about 26MHz, and is proportional to the input sub-harmonic power. The spectrum analysis of the 2nd harmonic output frequency shows remarkably decreased the phase noise level.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.1
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• pp.17-24
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• 2008

This paper deals with a millimeter wave source which is utilizing sub-harmonic injection-synchronization technique. A 8.7GHz oscillator with MES-FET is fabricated, and is driven as a harmonic output oscillator at 17.4GHz by means of sub-harmonic injection-synchronization. The oscillator operates as a multiplier as well as oscillator in this system. Adopting this technique, we can obtain a high stable, high frequency millimeter wave source even though self-oscillating frequency of an oscillator is relatively low. In the experiments, the range of injection-synchronization is about 26MHz and is proportional to the input sub-harmonic power. From the spectrum analysis of the 2nd harmonic output. we blow that the phase noise of the harmonic oscillator is remarkably decreased.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.3
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• pp.438-444
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• 2015

A new approach to the active phased arrays for the second harmonic generation is presented. Phase variation between the second harmonic oscillators by the mutual synchronization is analyzed theoretically. In this coupling, the active antenna consists of the FET oscillator which plays two roles in fundamental oscillation and frequency multiplying, and the patch antenna resonated at the second harmonic frequency. The radiated second harmonic wave was scanned by varying the free-running oscillation frequencies of the active antennas. In the experiment using the 2-elements array and the 4-elements array, the radiated beam of the second harmonic wave was scanned more widely compared with the case of the fundamental wave radiation.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2002.11a
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• pp.16-20
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• 2002

This paper describes the resistive FET mixer with low IF for the 4-Ch DBF(Digital Beam Forming) receiver with LNA(Low Noise Amplifier). This DBF receiver based on the direct conversion method is generally suitable for high-speed wireless mobile communications. A radio frequency(RF), a local oscillator(LO) and an intermediate frequency(IF) considered in this research are 2.09 ㎓, 2.08 ㎓ and 10㎒, respectively. The RF input power, LO input power and Vgs are used -10㏈m, 6㏈m and -0.4 V, respectively. In the 4-Ch resistive FET mixer with LNA, the measured IF and harmonic components of 10㎒, 20㎒, 2.09㎓ and 4.17㎓ are about -12.5 ㏈m, -57㏈m, -40㏈m and -54㏈m, respectively. The IF output power observed at each channel of 10㎒ is about -12.5㏈m and it is higher 27.5 ㏈m than the maximum harmonic component of 2.09㎓. Each IF output spectrum of the 4-Ch is observed almost same value and it shows a good agreement with the prediction.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.4
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• pp.787-792
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• 2004

This paper shows the design, fabrication and performance of oscillator appled to 5.5GHz RF module for local wireless communication system. Super low noise HJ FET of NE3210S01 is used to obtain a good phase noise Performance. The design Parameters for the optimum operating performance are simulated with ADS simulation. The measured out Power is 10 dBm at 5.5GHz, the second harmonic suppression -31 dBc, and the phase noise characteristics -98.83 dBc at 100kHz offset frequency, respectively. This implemented oscillator is available to local wireless Communication system.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2004.05b
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• pp.96-100
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• 2004

This paper shows the design, fabrication and performance of oscillator appled to 5.5GHz RF module for local wireless communication system. Super low noise HJ FET of NE3210S01 is used to obtain a good phase noise Performance. The design Parameters for the optimum operating performance are simulated with ADS simulation. The measured out Power is 10 ㏈m at 5.5GHz, the second harmonic suppression -31 ㏈c, and the phase noise characteristics -98.83 ㏈c at 100KHz offset frequency, respectively. This implemented oscillator is available to local wireless Communication system.

• Journal of electromagnetic engineering and science
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• v.2 no.2
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• pp.117-123
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• 2002

This paper describes the design for the resistive FET mixer with low If for the 4-Ch DBF(Digital Beam Forming) receiver This DBF receiver based on the direct conversion method is generally suitable for high-speed wireless mobile communications. A radio frequency(RF), a local oscillator(LO) and an intermediate frequency(If) considered in this research are 2.09 GHz, 2.08 CHz and 10 MHz, respectively. This mixer is composed of band pass filter, a low pass filter and a DC bias circuit. Super low noise HJ FET of NE3210S01 is considered in design. The RE input power, LO input power and Vcs are used -10 dBm, 6 dBm and -0.4 V, respectively. In the 4-Ch resistive FET mixer, the measured If and harmonic components of 10 MHe, 20 MHz and 2.087 CHz are about -19.2 dBm, -66 dBm and -48 dBm, respectively The If output power observed at each channel of 10 MHz is about -19.2 dBm and it is higher 28.8 dBm than the maximum harmonic component of 2.087 CHz. Each If output spectrum of the 4-Ch is observed almost same value and it shows a good agreement with the prediction.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.7
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• pp.613-624
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• 2002

Electrical characteristics of two types of 20 GHz Push-Push GaAs MESFET dielectric resonator oscillators having Wilkinson and T-junction power combiners for the output stage have been investigated and compared. So we have explained that the output power and phase noise properties of the Push-push FET DRO are depending on return loss and isolation characteristics of power combiner at the fundamental and the second harmonic frequencies. A Push-push oscillator for suppressing the fundamental frequency of 10 GHz and enhancing the second harmonic of 20 GHz has been designed and fabricated in microstrip configuration on 20 mil thick RT-Duroid($\varepsilon$$_{r}$ = 2.52) Teflon substrate. Return loss and isolation characteristics of T-junction and Wilkinson have been measured at the fundamental frequency of 10.2 GHz and the second harmonic frequency of 20.5 GHz. At the fundamental frequency, -12 dB return loss and -3.7 dB isolation have been measured for the T-junction power combiner, and -14 dB return loss and -11 dB isolation fur the Wilkinson power combiner. At the second harmonic frequency, -10 dB return loss and -7.5 dB isolation have been obtained for the T-junction power combiner, and -23 dB return loss and -22 dB isolation for the Wilkinson power combiner. As a result, we have confirmed that the oscillator based on the Wilkinson power combiner with better retrun loss and isolation characteristics produces more output power and better phase noise characteristics..

• Journal of Electrical Engineering and information Science
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• v.2 no.6
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• pp.202-207
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• 1997

Design and fabrication issues for an L-band GaAs Monolithic Microwave Integrated Circuit(MMIC) Voltage Controlled Oscillator(VCO) as a component of Personal Communications Systems(PCS) Radio Frequency(RF) transceiver are discussed. An ion-implanted GaAs MESFET tailored toward low current and low noise with 0.5mm gate length and 300mm gate width has been used as an active device, while an FET with the drain shorted to the source has been used as the voltage variable capacitor. The principal design was based on a self-biased FET with capacitive feedback. A tuning range of 140MHz and 58MHz has been obtained by 3V change for a 600mm and a 300mm devices, respectively. The oscillator output power was 6.5dBm wth 14mA DC current supply at 3.6V. The phase noise without any buffer or PLL was 93dB/1Hz at 100KHz offset. Harmonic balance analysis was used for the non-linear simulation after a linear simulation. All layout induced parasitics were incorporated into the simulation with EEFET2 non-linear FET model. The fabricated circuits were measured using a coplanar-type probe for bare chips and test jigs with ceramic packages.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.8
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• pp.1566-1571
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• 2011

The objective of this paper is to present a quantitative analysis leading to the assessment of optimum terminating impedances in the design of active frequency multipliers. A brief analysis of the basic principal of the GaAs FET frequency multiplier is presented. The analysis is outlined in bias optimization and drive power determination. Utilizing the equivalent circuit model of GaAs FET, we have simulated the optimized load impedance for the maximum output of the active frequency multipliers. The C-class and reverse C-class frequency doublers have been fabricated and the load impedances have been measured. The experimental results are in good agreement with the estimated results in the simulation with the accuracy of 90%.