• Journal of Power Electronics
• /
• v.16 no.5
• /
• pp.1698-1705
• /
• 2016

In this paper, a hardware-in-the-loop simulation platform for MMCs is established, which connects a real time digital simulator (RTDS) and a designed MMC controller with optical fiber. In this platform, the converter valves are simulated with a small time step of 2.5 microsecond in the RTDS, and multicore technology is implemented for the controller so that the parallel valve control is distributed between different cores. Therefore, the designed controller can satisfy the requirements of real-time control. The functions of the designed platform and the rationality for the designed controller are verified through experimental tests. The results show that different modulation modes and various control strategies can be implemented in the simulation platform and that each control objective can been tracked accurately and with a fast dynamic response.

• Journal of Power Electronics
• /
• v.11 no.4
• /
• pp.471-478
• /
• 2011

This paper addresses the establishment of a kVA-range plug-in hybrid electrical vehicle (PHEV) integration test platform and associated issues. Advancements in battery and power electronic technology, hybrid vehicles are becoming increasingly dependent on the electrical energy provided by the batteries. Minimal or no support by the internal combustion engine may result in the vehicle being occasionally unable to recharge the batteries during highly dynamic driving that occurs in urban areas. The inability to sustain its own energy source creates a situation where the vehicle must connect to the electrical grid in order to recharge its batteries. The effects of a large penetration of electric vehicles connected into the grid are still relatively unknown. This paper presents a novel methodology that will be utilized to study the effects of PHEV charging at the sub-transmission level. The proposed test platform utilizes the power hardware-in-the-loop (PHIL) concept in conjunction with high-fidelity PHEV energy system simulation models. The battery, in particular, is simulated utilizing a real-time digital simulator ($RTDS^{TM}$) which generates appropriate control commands to a power electronics-based voltage amplifier that interfaces via a LC-LC-type filter to a power grid. In addition, the PHEV impact is evaluated via another power electronic converter controlled through $dSPACE^{TM}$, a rapid control systems prototyping software.

• Journal of KIISE:Computer Systems and Theory
• /
• v.33 no.11
• /
• pp.836-852
• /
• 2006

This paper proposes an L1 cache prefetch scheme using an excessively aggressive hardware prefetcher and a hardware prefetch filter having a small direct-mapped filtering cache. A quantitative analysis method has been introduced and applied to analyze nonideal effects of aggressive cache prefetching. From those analysis results, the structure and algorithm of a prefetch filter has been derived and simulated, and the overall system performance has been measured using a cycle-by-cycle cache simulator. Experimental results show that the proposed scheme improves the overall system performance by 18% on the average over several benchmarks

• Proceedings of the KIPE Conference
• /
• 2015.11a
• /
• pp.221-222
• /
• 2015

ITER AC/DC Converter의 부하는 초전도 코일이며 이에 필요한 컨버터는 총 6종류(2상한:TF, 4상한:PF, CS, VS, CCU/L, CCS)가 있다. 이중 VS 컨버터(${\pm}1050V$, ${\pm}22.5kA$)는 6대가 직렬로 접속되어 운전되고 CS 컨버터(${\pm}1050V$, ${\pm}4.5kA$)는 4대가 직렬로 접속되어 운전한다. 이들 컨버터용 제어기의 개발 단계에서 실 부하상태를 준비하는 것은 어렵기 때문에 $RTDS^{TM}$ (Real Time Digital Simulator)를 이용하여 제어 대상인 High Power 부분과 초전도 코일의 동적 시스템 모델을 HILS(Hardware-in-the-Loop Simulation)로 구축하였다. 본 논문에서는 HILS 구축에 대한 상세한 내용과 이를 활용하여 Control 시스템을 검증한 결과를 서술하였다.

• Proceedings of the KIPE Conference
• /
• 2000.07a
• /
• pp.651-656
• /
• 2000

This paper describes the optimal sizing of each component using computer simulation and presents the efficient operating scheme of series HEV using hardware simulator the equivalent system. As the sizing method of components have been experimental and empirical it is needed to spend much time and development cost. however the results of computer simulation will set the optimal sizing of components in short time. There are two type of driving control power-tracking mode and load-levelling mode in series HEV. This paper presents that series HEV be operated in the load-levelling mode which is more efficient that power-tracking mode.

• Proceedings of the KIPE Conference
• /
• 2012.11a
• /
• pp.183-184
• /
• 2012

2010년부터 민간기업인 LS산전과 한국전력공사의 공동 개발을 통하여 60MW급 ${\pm}80kV$ HVDC (High Voltage DC transmission System)전류형 HVDC시스템 알고리즘 국산화 개발을 진행하여 2012년 3월 개발을 완료하였다. 개발된 알고리즘의 성능, 안정성 및 신뢰성을 확보하기 위하여 LS산전에서 개발한 Hardware 플랫폼에 제어 알고리즘을 탑재하고 RTDS(Real Time Digital Simulator)를 통한 연계시험을 진행하여 이를 검증하였다. 본 논문에서는 개발된 HVDC 제어 알고리즘의 기능과 RTDS연계 시험결과를 소개하고자 한다.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.27 no.12
• /
• pp.1906-1915
• /
• 1990

A synthesis system generating sequential circuits from a high-level hardware descdription language CHDL, modelling language for Thor functional/behavioral simulator, is developed. In this paper, we describe the semantic analysis process, state minimization and state assignment algorithms. proposed assignment algorithm generates optimal state vectors using constraint matrix and similarity graph. Expremental results for MCNC benchmarks, standard test circuits, show that the system inplementing the proposed algorithms can be a viable tool for designing large finite state machines.

• 제어로봇시스템학회:학술대회논문집
• /
• 1989.10a
• /
• pp.50-53
• /
• 1989

This paper presents the configuration and performance test results of a SDARS, which consists of three rate gyros and Zilog 8002 microprocessor. Real time hardware-inthe-loop simulation was performed by 3 axis flight motion simulator applying the assumed typical profiles of angular motion. Test results showed that the performance of SDARS was satisfactory. And, attitude errors was reduced by compensation of gyro errors.

• 제어로봇시스템학회:학술대회논문집
• /
• 2000.10a
• /
• pp.216-216
• /
• 2000

In this paper, we introduce a new roadway-departure prevention algorithm and the developed Hardware-in-the-Loop-Simulator (HiLS) for applying the new algorithm. A sliding-mode controller is used for lateral position control. And, the HiLS consists of real car elements, a micro-control board, and a self-aligning torque generator Finally from the display module, the perspective view and bird view of the animated vehicle can be seen simultaneously.

• Proceedings of the Korean Information Science Society Conference
• /
• 2000.10c
• /
• pp.3-5
• /
• 2000

고성능의 3차원 그래픽 가속기 설계를 위해서는 어플리케이션, 하드웨어 구조, 수행모델 채택, 설계비용 등의 다양한 고려사항이 요구되고 따라서 각 모델에 따른 사전 시뮬레이션 환경구축은 반드시 필요하다. 이에 본 논문에서는 기본적인 3차원 그래픽 파이프라인 작업을 수행하여 다양한 결과를 보여주는 이식성 높은 시뮬레이션 환경을 제공함으로써 3차원 그래픽 가속하드웨어 세부모듈 설계에 필요한 설계 고려사항을 효과적으로 제시할 수 있게 하였다.