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An L1 Cache Prefetching Scheme using Excessively Aggressive Prefetchering and a Small Direct-mapped Filtering Cache  

Chon, Young-Suk (충북대학교 컴퓨터과학과)
Publication Information
Journal of KIISE:Computer Systems and Theory / v.33, no.11, 2006 , pp. 836-852 More about this Journal
Abstract
This paper proposes an L1 cache prefetch scheme using an excessively aggressive hardware prefetcher and a hardware prefetch filter having a small direct-mapped filtering cache. A quantitative analysis method has been introduced and applied to analyze nonideal effects of aggressive cache prefetching. From those analysis results, the structure and algorithm of a prefetch filter has been derived and simulated, and the overall system performance has been measured using a cycle-by-cycle cache simulator. Experimental results show that the proposed scheme improves the overall system performance by 18% on the average over several benchmarks
Keywords
cache memory; cache prefetch; hardware prefetcher; prefetch filter;
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Times Cited By KSCI : 1  (Citation Analysis)
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1 X. Zhuang and H-H S. Lee, 'Hardware-based Cache Pollution Filtering Mechanism for Aggressive Prefetches,' in Proc. IEEE Int. Conf. on Parallel Processing, pp.286-293, Oct. 2003   DOI
2 O. Mutlu, H. Kim, D. N. Armstrong and Y. N. Part, 'Cache Filtering Techniques to Reduce the Negative Impact of Useless Speculative Memory References on Processor Performance,' in Proc. 16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD'04), pp. 2-9, 2004   DOI
3 P. G. Emma, A. Hartstein, T. R. Puzak and V. Srinivasan, 'Exploring the Limits of Prefetching,' IBM J. Research and Development, Vol. 49, No. 2-3, pp. 127-144, Jan. 2005   DOI   ScienceOn
4 A. Srivastava and A. Eustace, 'ATOM: A System for Building Customized Program Analysis Tools,' in Proc. ACM SIGPLAN 94, pp. 196-205, 1994   DOI
5 Y. Ruan, V. S. Pai, E. Nahum and J. M. Tracey, 'Evaluating the Impact of Simultaneous Multi-threading on Network Servers using Real Hardware,' in Proc. ACM Int. Conf. on Measurement and Modeling of Computer Systems, pp. 315-326, 2005   DOI
6 J. H. Lee, S. W. Jeong, S. D. Kim and C. C. Weems, 'An Intelligent Cache System with Hardware Prefetching for High Performance,' IEEE Trans. on computers, Vol. 52, No 5, May. 2003   DOI   ScienceOn
7 전영숙, 문현주, 김석일, 전중남, '단속적 불규칙 주소 간격을 갖는 멀티미디어 데이터를 위한 하드웨어 캐시 선인출 방법', 정보과학회논문지, 제31권, 제11호, pp.658-672.2004   과학기술학회마을
8 T.-F. Chen and J-L Baer, 'Effective Hardware-Based data prefetching for High-Performance Processors,' IEEE Trans. Computers, Vol. 44, No. 5, pp. 609-623, May 1995   DOI   ScienceOn
9 J. Pomerene, T. Puzak, R. Rechtschaffen and F. Sparacio, 'Prefetching System for a Cache Having a Second Directory for Sequentially Accessed Blocks,' US Patent 4,807,110, Feb. 1989
10 M. Charney and T. Puzak, 'Prefetching and Memory System Behavior of the SPEC95 Benchmark Suite,' IBM J. Research and Development, vol. 41, no. 3, pp. 265-286, May 1997   DOI   ScienceOn
11 Y. Solihin, J. Lee and J. Torrellas, 'Correlation Prefetching with a User-Level Memory Thread,' IEEE Trans. Computers, Vol. 14, No. 6, June 2003
12 D. Joseph and D. Grunwald, 'Prefetching Using Markov Predictors,' IEEE Trans. on computers, Vol. 48, No 2, Feb. 1999   DOI   ScienceOn
13 J. Kim, K. V. Palem and W-F. Wong, 'A Framework for Data Prefetching using Off-line Training of Markovian Predictors,' in Proc. IEEE Int. Conf. on Computer Design (ICCD), pp. 340-347, Sep. 2002   DOI
14 G. Hariprakash, R. Achutharaman, A. R. Omondi, 'DSTRIDE: Data-Cache Miss-Address-Based Stride Prefetching Scheme for Multimedia Processors,' 6th Australasian Computer Systems Architecture Conference (AustCSAC'01), pp. 62-70, Jan. 29-30, 2001   DOI
15 V. Srinivasan, G. Tyson and E. Davidson, 'A Static Filter for Reducing Prefetch Traffic,' Technical Report CSE-TR-400-99, University of Michigan, 1999
16 V. Srinivasan, E. S. Davidson and G. S. Tyson, 'A Prefetch Taxonomy,' IEEE Trans. Computers, Vol. 53, No. 2, pp. 126-140, Feb. 2004   DOI   ScienceOn
17 D. Callahan, K. Kennedy, and A. Porterfield, 'Software Prefetching,' in Proc: Fourth Int. Conf. Architectural Support for Programming Languages and Operating Systems, pp. 40-52, Apr. 1991   DOI
18 J. D. Gindele, 'Buffer Block Prefetching Method,' IBM Technical Disclosure Bull., vol. 20, no. 2, pp. 696-697, July 1977
19 C.-K. Luk and T. Mowry, 'Compiler Based Prefetching for Recursive Data Structures,' in Proc: Seventh Int. Conf. Architectural Support for Programming Languages and Operating Systems, pp. 222-233, Oct. 1996   DOI
20 A. J. Smith, 'Cache Memories,' ACM Computing Surveys, Vol. 14, No. 3, pp. 473-530, Sep. 1982   DOI   ScienceOn
21 R. Cucchiara, M. Piccardi and A. Prati, 'Hardware Prefetching Technique for Cache Memories in Multimedia Applications,' in Proc. IEEE Intl. Workshop on Computer Architectures for Machine Perception (CAMP), 2000   DOI
22 N. P. Jouppi, 'Improving Directed-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers,' in Proc. of the 17th Annual International Symposium on Computer Architecture, pp. 364-373, May 1990
23 J. L. Baer and T.-F. Chen, 'An Effective On-chip Preloading Scheme to Reduce Data Access Penalty,' in Proc. of Supercomputing '91, pp. 176-186, Nov. 1991   DOI