• Journal of the Korean Society for Precision Engineering
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• v.1 no.2
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• pp.69-74
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• 1984

In this paper we present a microprocessor-based interpolator using algebraic arithmetic method. The interpolator consists of 2910 "bit-slice" microprocessor chips and 0.5K ROMs of microprogram memory. The system design is an instruction-data-based architecture with 250ns cycle time. A significant feature of the interpolator is that it has flexibility, very fast interpolatioon speed of (max) 250K pulses/sec, and performs additional functions simultaneously. Throughout the paper detailed explanations are given as to how one can design the hardware and software of the interpolator efficently. In addi- tion to hardware and software design, experimental results are pressented.ressented.

• Journal of the Korean Society of Industry Convergence
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• v.26 no.2_1
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• pp.239-248
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• 2023

In this paper, we conduct a study on the design that can secure the safety of the EPLA system by performing safety activities based on the ISO 26262 standard for vehicle functional safety. In the case of a company developing a detailed system, it is responsible for verification through hardware design and safety analysis in the overall flow of safety activities, and safety analysis according to the ASIL safety level must be properly performed. At this time, there are cases where the safety goal quantitative metric value suggested by the ISO 26262 standard cannot be satisfied only by the hardware design of the basic function, so it is necessary to design and install the safety mechanism. Based on ISO 26262 safety activities, it is possible to derive an effective design plan through hardware safety analysis.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.38 no.3
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• pp.44-51
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• 2001

In general, the realization of spaceborne system is constrained by its space environment. In this paper, we suggest chirp stitching technique which generates and processes wideband radar signal with minimum hardware, design and implement transmit/receive equipments and operating programs to satisfy the requirement of this spaceborne high resolution SAR(Synthetic Aperture Radar). We apply the top down design approach to this system, and divide hardware into equipment, module and circuit levels, and software into SR(Software Requirement), AD(Architecture Design), DD(Detailed Design) and coding levels, and then extract each requirement to satisfy the wideband requirement of this spaceborne high resolution SAR. We, at first, test the hardware functions, confirm the wideband handling capability of this system with 85MHz wideband signals generated from two 42.5MHz narrow band signals, and show that this system can be used in spaceborne high resolution SARs.

• Journal of the Korean Society for Railway
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• v.5 no.3
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• pp.158-166
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• 2002

In this paper, we introduce the software and hardware of the measurement system for on-line testing and evaluation of high speed railway. The test items focus on the verification of the performance and acquirement of the technical data of the high speed railway system. The software controls the hardware of the measurement system, perform the analysis and calculation of measurement data and acts as interface between users and the system hardware. For this purpose, three programs a measuring program, a monitoring program and post-processing program are developed. The detailed test scenario is in the process of development to closely follow the process of development and design of the system.

• IEMEK Journal of Embedded Systems and Applications
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• v.6 no.6
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• pp.361-367
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• 2011

In this paper, we propose an interactive embedded system framework for efficient training management in u-health environment. First, we analyzed various requirements of smart training systems for quality of life. We also analyzed the oversea trends and positive effects of the embedded system in terms of both technical and economical factors. Second, we proposed detailed design specification for embedded hardware implementation. Third, we developed effective OS(Operating System) specification for the embedded hardware. Finally, we developed a training scenario and embedded applications such as training control software and analysis software for the smart training systems.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.33 no.2
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• pp.62-69
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• 1984

In this paper we present a microprocessor-based interpolator using algebraic arithmetic method. The interpolator consists of 2900 "bit-slice" microprocessor chips and 0.5K ROMs of 36-bit microprogram memory. The system design is an instuction-data-based architecture with 250ns cycle time. A significant feature of the interpolator is that it has flexibility, very fast interpolation speed of 250 K pulses/sec, and performs additional functions simultaneously. Throughout the paper detailed explanations are given as to how one can design the hardware and software, and experimental results are presented.presented.

• Journal of Astronomy and Space Sciences
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• v.27 no.4
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• pp.393-400
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• 2010

Korea Astronomy and Space Science Institute has been developing one mobile satellite laser ranging system named as accurate ranging system for geodetic observation-mobile (ARGO-M). Preliminary design of ARGO-M operation system (AOS) which is one of the ARGO-M subsystems was completed in 2009. Preliminary design results are applied to the following development phase by performing detailed design with analysis of pre-defined requirements and analysis of the derived specifications. This paper addresses the preliminary design of the whole AOS. The design results in operation and control part which is a key part in the operation system are described in detail. Analysis results of the interface between operation-supporting hardware and the control computer are summarized, which is necessary in defining the requirements for the operation-supporting hardware. Results of this study are expected to be used in the critical design phase to finalize the design process.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.1
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• pp.107-113
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• 2001

This paper describes dynamic performance analysis of a STATCOM based on 3-level inverter. Major attention is focused on the controller design for 3-level inverter, including regulator design for voltage sharing across the dc link capacitors. A detailed simulation model was developed with Matlab and a scaled hardware model was built and tested to verify the proposed approach. Both simulation and experimental results confirm that the developed controller can regulate the reactive power. The developed controller could be effectively applied to the actual hardware system for STATCOM.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.11
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• pp.663-674
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• 2003

Bump mapping is a technique that represents the detailed parts of the object surface, such as a perturberance of the skin of a peanut, using the geometry mapping without complex modeling. However, the hardware implementation for bump mapping is considerable, because a large amount of per pixel computation, including the normal vector shading, is required. In this paper, we propose a new bump mapping algorithm using the polar coordinate system and its hardware architecture. Compared with other existing architectures, our approach performs bump mapping effectively by using a new vector rotation method for transformation into the reference space and minimizing illumination calculation. Consequently, our proposed architecture reduces a large amount of computation and hardware requirements.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.22 no.1
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• pp.135-140
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• 2022

In addition to the stack that directly generates electricity by the reaction of hydrogen and oxygen, the fuel cell power generation system has a reformer that generates hydrogen from various fuels such as methanol and natural gas. It also consists of a power converter that converts the DC voltage generated in the stack into a stable AC voltage. The fuel cell output of such a system is direct current, and in order to be used at home, an inverter device that converts it into alternating current through a power converter is required. In addition, a DC-DC step-up converter is used to boost the fuel cell voltage to about 30~70V, which is the inverter operating voltage, to about 380V. The DC-DC step-up converter is a DC voltage variable device that exists between the fuel cell output and the inverter. Accordingly, since a constant output voltage of the converter is generated in response to a change in the output voltage of the fuel cell, the inverter can receive constant power regardless of the voltage change of the fuel cell. Therefore, in this paper, we discuss the detailed hardware design of the full-bridge converter, which is the main power source of the inverter that receives the fuel cell output voltage (30~70V) as an input and is applied to the grid among the members of the fuel cell power generation system.