• Journal of The Korean Association of Information Education
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• v.5 no.1
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• pp.83-100
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• 2001

A survey about uses of internet was conducted for elementary, middle and high school mathematics teachers in Seoul to determine the accessibility, level of usage, expertise, and general attitudes towards using internet for educational purposes. The survey indicated that only half of the teachers had computers in the classroom and less than 10% of the teachers had access to the internet in the classroom. The survey suggests that in order to quickly incorporate internet into mathematics education, teachers need help in getting the hardware, training for technology application, and Korean based resources on the internet. The survey also suggests that the teachers need to recognize the power of the internet usage and to do research to find a better way to integrate technology into their teaching.

• Journal of the Korea Convergence Society
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• v.5 no.4
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• pp.93-99
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• 2014

Cloud computing refers to borrow IT resources as needed by leveraging Internet technology and pay as much as you used by supporting real-time scalability depending on the service load. Virtualization which is the main technology of cloud computing is a technology that server, storage and hardware are regarded as not separate system but one system area and are allocated as needed. However, the security mechanisms provided by virtualized environments are difficult to cope with the traditional security mechanisms, having basic levels of visibility, control and audit function, on which the server is designed to monitor the traffic between the servers. In this paper, the security vulnerabilities of virtualization are analysed in the cloud computing environment and cloud virtualization security recommendations are proposed.

• Convergence Security Journal
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• v.16 no.2
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• pp.3-9
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• 2016

Recently, a lot of researches have been done to increase the life span of network using the energy efficient sensor node in WSN. In the WSN environment, we must use limited amount of energy and hardware. Therefore, it is necessary to design energy efficient communication protocol and use limited resources. Cluster based routing method such as LEACH and HEED get the energy efficient routing using data communication between cluster head and related member nodes. In this paper, we propose an energy efficient routing algorithm as well as performance result using simulation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.5
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• pp.91-97
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• 2004

A digital over-sampling noise-shaping coder to achieve the processing accuracy for the audio signal bandwidth is designed. In order to implement an optimized design of the noise-shaping coder as a form of U (intellectual property), circuit design techniques that optimize the multiplication and the ROM architectures are proposed with emphasis on the low-voltage operation under 2.0 V and the minimization of the hardware resources. In the design and verification methodology, the overall architectures and the internal bit width have been determined through behavioral simulations. The overall performances including timing margin have been estimated through transistor-level simulations. Furthermore, the test results of the implemented chip using a 0.35-${\mu}{\textrm}{m}$ standard CMOS process proposed the validity of the proposed circuits and the design methodology.

• International Journal of Aeronautical and Space Sciences
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• v.17 no.4
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• pp.467-475
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• 2016

Ultrasonic propagation imaging (UPI) has shown great potential for detection of impairments in complex structures and can be used in wide range of non-destructive evaluation and structural health monitoring applications. The software implementation of such algorithms showed a tendency in time-consumption with increment in scan area because the processor shares its resources with a number of programs running at the same time. This issue was addressed by using field programmable gate arrays (FPGA) that is a dedicated processing solution and used for high speed signal processing algorithms. For this purpose, we need an independent and flexible block of logic which can be used with continuously evolvable hardware based on FPGA. In this paper, we developed an FPGA-based ultrasonic propagation imaging system, where FPGA functions for both data acquisition system and real-time ultrasonic signal processing. The developed UPI system using FPGA board provides better cost-effectiveness and resolution than digitizers, and much faster signal processing time than CPU which was tested using basic ultrasonic propagation algorithms such as ultrasonic wave propagation imaging and multi-directional adjacent wave subtraction. Finally, a comparison of results for processing time between a CPU-based UPI system and the novel FPGA-based system were presented to justify the objective of this research.

• Journal of Electrical Engineering and Technology
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• v.10 no.4
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• pp.1655-1666
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• 2015

This paper proposes a new approach of Field Programmable Gate Array (FPGA) controlled digital implementation of shunt active power filter (SAPF) under steady state and dynamic operations. Typical implementations of SAPF uses microprocessor and digital signal processor (DSP) but it limited for complex algorithm structure, absence of feedback loop delays and their cost can be exceed the benefit they bring. In this paper, the hardware resources of an FPGA are configured and implemented in order to overcome conventional microcontroller or digital signal processor implementations. This proposed FPGA digital implementation scheme has very less execution time and boosts the overall performance of the system. The FPGA controller integrates the entire control algorithm of an SAPF, including synchronous reference frame transformation, phase locked loop, low pass filter and inverter current controller etc. All these required algorithms are implemented with a single all-on chip FPGA module which provides freedom to reconfigure for any other applications. The entire algorithm is coded, processed and simulated using Xilinx 12.1 ISE suite to estimate the advantages of the proposed system. The coded algorithm is also defused on a single all-on-chip Xilinx Spartan 3A DSP-XC3SD1800 laboratory prototype and experimental results thus obtained match with simulated counterparts under the dynamic state and steady state operating conditions.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 1992.04b
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• pp.436-443
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• 1992

Presented in the paper is a systematic approach to constructing a Petri net model of FAS (flexible assembly system). Petri net is widely used in modeling automated manufacturing systems. But, it found to be very difficult for an FA engineer to build a correct model of an FAS with Petri net symbols (ie, place, transition, and token) from the beginning. An automated manufacturing system in general is built from a set of "standard" hardware components. An FAS in particular is usually composed of assembly robots, work tables, conveyor lines, buffer storages, part feeders, etc. In the proposed modeling scheme, each type of standard resources is represented as a standard "module" which is a sub Petri net. Then, the model of a FAS can be conveniently constructed using the predefined modules the same way the FAS itself is built from the standard components. The network representation of a FAS is termed a JR-net (job resource relation net) which is easy to construct. This JR net is then mechanically converted to a formal Petri net (to simulate the behavior of the FAS). The proposed modeling scheme may easily be extended to the modeling of other types of automated manufacturing systems such as FMS and AS/RS.ch as FMS and AS/RS.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.8 no.10
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• pp.3423-3438
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• 2014

In recent years, wearable sensor devices are reshaping the way people live, work, and play. A wearable sensor device is a computer that is subsumed into the personal space of the user, and is always on, and always accessible. Therefore, among the most salient aspects of a wearable sensor device should be a small form factor, long battery lifetime, and real-time characteristics. Thereby, sophisticated applications of a wearable sensor device use real-time operating systems to guarantee real-time deadlines. The deterministic multi-dimensional task scheduling algorithms are implemented on ARC (Actual Remote Control) with relatively limited hardware resources. ARC is a wearable wristwatch-type remote controller; it can also serve as a universal remote control, for various wearable sensor devices. In the proposed algorithms, there is no limit on the maximum number of task priorities, and the memory requirement can be dramatically reduced. Furthermore, regardless of the number of tasks, the complexity of the time and space of the proposed algorithms is O(1). A valuable contribution of this work is to guarantee real-time deadlines for wearable sensor devices.

• Journal of KIISE:Computer Systems and Theory
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• v.33 no.4
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• pp.223-230
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• 2006

The method of implementing a modular multiplier for Montgomery multiplication by using an adder depends on a selected adder. When using a CPA, there is a carry propagation problem. When using a CSA, it needs an additional calculation for a final result. The Multiplier using a Multi-precision CSA can solve both problems simultaneously by combining a CSA and a CPA. This paper presents an improved MP-CSA which reduces hardware resources and operation time by changing a MP-CSA's carry chain structure. Consequently, the proposed multiplier is more suitable for the module of long bit multiplication and exponentiation using a modular multiplier repeatedly.

• Macromolecular Research
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• v.14 no.2
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• pp.140-145
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• 2006

E-science refers to the large-scale science that will increasingly be carried out through distributed global collaborations enabled by the Internet. The Grid is a service-oriented architecture proposed to provide access to very large data collections, very large scale computing resources and remote facilities. Web services, which are server applications, enable online access to service providers. Web portal interfaces can further hide the complexity of accessing facility's services. The main use of synchrotron radiation (SR) facilities by protein crystallographers is to collect the best possible diffraction data for reasonably well defined problems. Significant effort is therefore being made throughout the world to automate SR protein crystallography facilities so scientists can achieve high throughput, even if they are not expert in all the techniques. By applying the above technologies, the e-HTPX project, a distributed computing infrastructure, was designed to help scientists remotely plan, initiate and monitor experiments for protein crystallographic structure determination. A description of both the hardware and control software is given together in this paper.