• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.2
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• pp.117-126
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• 2012

This paper provides a method for compression transmission of on-chip bus data. As the data traffic on on-chip buses is rapidly increasing with enlarged video resolutions, many video processor chips suffer from a lack of bus bandwidth and their IP cores have to wait for a longer time to get a bus grant. In multimedia data such as images and video, the adjacent data signals very often have little or no difference between them. Taking advantage of this point, this paper develops a simple bus data compression method to improve the chip performance and presents its hardware implementation. The method is applied to a Video Codec - 1 (VC-1) decoder chip and reduces the processing time of one macro-block by 13.6% and 10.3% for SD and HD videos, respectively

• 한국정보통신설비학회:학술대회논문집
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• 2007.08a
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• pp.289-292
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• 2007

FTTH (Fiber to the Home) is constructed with optical devices and optical cables from central office (CO) to subscribers. With FTTH, it is possible to provide service platform in order to meet the customers' emerging demands for more bandwidth/security and diverse IP multimedia applications including high definition (HD) video streaming service. FTTH can provide enough bandwidth from 100Mbps to several Gbps per subscriber. It is also most appropriate network architecture for convergence of communication and broadcasting. So, FTTH is thought the final destination of telecom operators, since it is the fastest and most reliable solution so far and various IP multimedia services are possible through it. In this paper, newly attempted technologies of FTTH construction for apartment complexes using CWDM-PON system are discussed.

• Journal of Multimedia Information System
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• v.4 no.1
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• pp.19-26
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• 2017

The compression of video for both full HD and UHD requires the inclusion of extra vertical lines to every video frame, named as the DTV essential hidden area (DEHA), for the effective functioning of the MPEG-2/4/H encoder, stream, and decoder. However, while the encoding/decoding process is dependent on the DEHA, the DEHA is conventionally viewed as a redundancy in terms of channel utilization or storage efficiency. This paper proposes a block mode DEHA method to more effectively utilize the DEHA. Partitioning video block images and then evenly filling the representative DEHA macroblocks with the average DC coefficient of the active video macroblock can minimize the amount of DEHA data entering the compressed video stream. Theoretically, this process results in smaller DEHA data entering the video stream. Experimental testing of the proposed block mode DEHA method revealed a slight improvement in the quality of the active video. Outside of this technological improvement to video quality, the attractiveness of the proposed DEHA method is also heightened by the ease that it can be implemented with existing video encoders.

• Proceedings of the IEEK Conference
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• 2003.11a
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• pp.513-516
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• 2003

Current paper introduces the additional multimedia module for digital TV. The module is developed for displaying the image captured by digital still camera, camcorder, or PC in the digital TV. For these purpose, the module has the interface circuit for accessing five media type of memory cards. It decodes JPEG, BMP, or TIFF image data saved in the memory card and converts the image data to analog RGB signal. It also supports three types of output image size from HD to WXGA resolution. So the introduced module could be adopted In the most of digital TV.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2013.11a
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• pp.186-189
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• 2013

최근 다양한 3D 콘텐츠들에 대한 사용자의 요구에 따라 HD(High Definition)화질 및 이를 넘어서는 고해상도(FHD(full high definition), UHD(ultra high definition))의 고품질 3D 방송 서비스에 대한 연구가 진행되고 있으며, 차세대 영상 기술로 주목되고 있는 3차원 비디오 기술은 사용자에게 실감 있는 영상을 제공할 수 있다, 하지만 많은 시점을 전부 촬영하는 것은 한계가 있으므로, 카메라의 깊이 정보를 이용하여, 전송하는 시점을 줄이고, 시점영상을 합성함으로써 사용하는 카메라의 수보다 더 많은 시점을 생성하는 방법이 필요하다. 현재 국제 표준화 기구인 MPEG(Moving Picture Experts Group)의 3차원 비디오 부호화(3D Video Coding, 3DVC)에서는 깊이영상을 가지는 3차원 비디오영상에 대한 효과적인 부호화 기술들에 대해 표준화가 진행되고 있다. 이에 본 논문은 HEVC 기반의 3D-HEVC에서 사용하는 표준 기술들에 대하여 소개하고, 현재 사용되고 있는 기술들에 대한 성능 평가를 분석 하였다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.05a
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• pp.345-348
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• 2013

This paper provides a method for compression and transmission of on-chip bus data. As the data traffic on on-chip buses is rapidly increasing with enlarged video resolutions, many video processor chips suffer from a lack of bus bandwidth and their IP cores have to wait for a longer time to get a bus grant. In multimedia data such as images and video, the adjacent data signals very often have little or no difference between them. Taking advantage of this point, this paper develops a simple bus data compression method to improve the chip performance and presents its hardware implementation. The method is applied to a Video Codec - 1 (VC-1) decoder chip and reduces the processing time of one macro-block by 13.6% and 10.3% for SD and HD videos, respectively.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.569-572
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• 2005

This paper proposed the design and implementation of a DSP platform for the various multimedia streaming. The DSP platform synchronizes with host PC to configure DSP and to transmit multimedia streaming through PCI. The suggested DSP platform decodes high-capacity video/audio data using the suggested high-speed FIFO, CPLD and memory interface. The buffer control techniques is proposed in other to avoid the under/over-run of the audio/video data during the audio/video decoding. For the DSP platform test, host PC transmits program stream(PS) that consists of the MPEG-2 video MP@ML and 5.1ch AC3 audio data (Coyote.mov file, half hour running time) to DSP platform. The DSP platform plays continuously back the high sound-quality audio and high-definition video at once.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.1
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• pp.192-196
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• 2010

Due to a development of a modem technology as Power Line Communication(PLC) over 200 Mbps, the high-speed multi-media data trasmission could be currently possible. The strength of the PLC has no more additional wiring work. PLC has also possible to high quality data transmission with currently electrical cable. It has a various strong point campare with existing wire and wireless communication technologies. In This paper we develop a high quality media transmitter-receiver based on merging the HomePlug AV, which is 200 Mbps class PLC technology and HDMI Interface technology. The video function was used for the VEDEO TEST GENERATOR in order to a property valuation. Smart Live 6 software were used for the assessment of audio property. As the result of measurement of the HD class images by capturing from the receiver of the PLC, the quality of images couldn't be confirm any deterioration, which has compared with original reflections. In case of audio part as the result of confirmation of the Phase, Magnitude, it has been confirmed that over 90% of nomal transmition and receiving of acoustic signal. It can be possible to have HD class Media service through the PLC.

• Proceedings of the KIEE Conference
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• 2006.10c
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• pp.391-393
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• 2006

In this paper, we develop a portable game device with uncompressed HD video and high quality sound output. Portable game devices support not only game function but also various complex functions recently. It especially supports TV-Out port to play realistic game, connecting a large screen display device. But the video and audio output signals of conventional TV-out port have the low performance and these signals are analog output. So, it is difficult that the users enjoy realistic game with benefit of high resolution digital TV. We propose the game device output with uncompressed digital signal, which has no delay of video/audio signal, also has strong immunity to external noise. Since it supports a high resolution video and high quality sound, users can playa realistic game. First, we implement the HDMI to the game device and we test reliability with the various resolutions video inputs and audio inputs. The proposed method can be applied multimedia devices requiring high performance output function as well as portable devices.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.11B
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• pp.1631-1639
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• 2010

This paper proposes a scheduling algorithm that can reduce the power consumed for execution of application programs and the communication cost incurred due to dependencies among tasks. The proposed scheduling algorithm can increase energy efficiency of the DVS(Dynamic Voltage Scaling) by estimating laxity usage during scheduling, making up for conventional algorithms that apply the DVS after scheduling. Energy efficiency can be increased by applying the proposed algorithm to complex multimedia applications. Experimental results show that energy consumptions for executing HD MPEG4, MotionJPEG codec, MP3, and Wavelet have been reduced by 11.2% on the average, when compared to conventional algorithms.