• Title/Summary/Keyword: H.264 / AVC

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Design of Invisible Watermarking for H.264/AVC Video Protection (H.264/AVC 비디오 보호를 위한 비가시적 워터마킹의 설계 및 검증)

  • Park, Hye-Jeong;Choi, Jun-Rim
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.6
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    • pp.74-79
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    • 2008
  • In this paper, we propose and design a new 0.264/AVC watermarking algorithm for protection of copyright by inserting a watermark after quantization. This invisible watermarking algorithm insets a watermark into chrominance components of I frame such that we can avoid degradation of original images. According to test results we could limit image degradation by 1dB, avoid bit rate increment within 2% and increase processing time by only 2%. The IP is designed by Hynix 0.25 micron technology and the maximum operating frequency of 115MHz is achieved. The PSNR of the embedded watermark is about 35dB according to the test result.

Implementation of IQ/IDCT in H.264/AVC Decoder Using Mobile Multi-Core GPGPU (모바일 멀티 코어 GP-GPU를 이용한 H.264/AVC 디코더 구현)

  • Kim, Dong-Han;Lee, Kwang-Yeob;Jeong, Jun-Mo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.10a
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    • pp.321-324
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    • 2010
  • There have been lots of researches on a multi-core processor. The enhancement has been performed through parallelization method. Multi-core architecture in the mobile environment has emerged. But, there is a limit to a mobile CPU's performance. GP-GPU(General-Purpose computing on Graphics Processing Units) can improve performance without adding other dedicated hardware. This paper presents the implementation of Inverse Quantization, Inverse DCT and Color Space Conversion module in H.264/AVC decoder using Multi-Core GP-GPU for a mobile environments. The proposed architecture improves approximately 50% of performance when it use all the features.

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Improved Error Detection Scheme Using Data Hiding in Motion Vector for H.264/AVC (움직임 벡터의 정보 숨김을 이용한 H.264/AVC의 향상된 오류 검출 방법)

  • Ko, Man-Geun;Suh, Jae-Won
    • The Journal of the Korea Contents Association
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    • v.13 no.6
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    • pp.20-29
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    • 2013
  • The compression of video data is intended for real-time transmission of band-limited channels. Compressed video bit-streams are very sensitive to transmission error. If we lose packets or receive them with errors during transmission, not only the current frame will be corrupted, but also the error will propagate to succeeding frames due to the spatio-temporal predictive coding structure of sequences. Error detection and concealment is a good approach to reduce the bad influence on the reconstructed visual quality. To increase concealment efficiency, we need to get some more accurate error detection algorithm. In this paper, We hide specific data into the motion vector difference of each macro-block, which is obtained from the procedure of inter prediction mode in H.264/AVC. Then, the location of errors can be detected easily by checking transmitted specific data in decoder. We verified that the proposed algorithm generates good performances in PSNR and subjective visual quality through the computer simulation by H.324M mobile simulation tool.

An Efficient VLSI Architecture of Deblocking Filter in H.264 Advanced Video Coding (H.264/AVC를 위한 디블록킹 필터의 효율적인 VLSI 구조)

  • Lee, Sung-Man;Park, Tae-Geun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.7
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    • pp.52-60
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    • 2008
  • The deblocking filter in the H.264/AVC video coding standard helps to reduce the blocking artifacts produced in the decoding process. But it consumes one third of the computational complexity in H.624/AVC decoder, which advocates an efficient design of a hardware accelerator for filtering. This paper proposes an architecture of deblocking filter using two filters and some registers for data reuse. Our architecture improves the throughput and minimize the number of external memory access by increasing data reuse. After initialization, two filters are able to perform filtering operation simultaneously. It takes only 96 clocks to complete filtering for one macroblock. We design and synthesis our architecture using Dongbuanam $0.18{\mu}m$ standard cell library and the maximum clock frequency is 200MHz.

Deblocking Filter for Low-complexity Video Decoder (저 복잡도 비디오 복호화기를 위한 디블록킹 필터)

  • Jo, Hyun-Ho;Nam, Jung-Hak;Jung, Kwang-Su;Sim, Dong-Gyu;Cho, Dae-Sung;Choi, Woong-Il
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.47 no.3
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    • pp.32-43
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    • 2010
  • This paper presents deblocking filter for low-complexity video decoder. Baseline profile of the H.264/AVC used for mobile devices such as mobile phones has two times higher compression performance than the MPEG-4 Visual but it has a problem of serious complexity as using 1/4-pel interpolation filter, adaptive entropy model and deblocking filter. This paper presents low-complexity deblocking filter for decreasing complexity of decoder with preserving the coding efficiency of the H.264/AVC. In this paper, the proposed low-complexity deblocking filter decreased 49% of branch instruction than conventional approach as calculating value of BS by using the CBP. In addition, a range of filtering of strong filter applied in intra macroblock boundaries was limited to two pixels. According to the experimental results, the proposed low-complexity deblocking filter decreased -0.02% of the BDBitrate comparison with baseline profile of the H.264/AVC, decreased 42% of the complexity of deblocking filter, and decreased 8.96% of the complexity of decoder.

A Hierarchical Group-Based CAVLC Decoder (계층적 그룹 기반의 CAVLC 복호기)

  • Ham, Dong-Hyeon;Lee, Hyoung-Pyo;Lee, Yong-Surk
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.45 no.2
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    • pp.26-32
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    • 2008
  • Video compression schemes have been developed and used for many years. Currently, H.264/AVC is the most efficient video coding standard. The H.264/AVC baseline profile adopts CAVLC(Context-Adaptive Variable Length Coding) method as an entropy coding method. CAVLC gives better performance in compression ratios than conventional VLC(Variable Length Coding). However, because CAVLC decoder uses a lot of VLC tables, the CAVLC decoder requires a lot of area in terms of hardware. Conversely, since it must look up the VLC tables, it gives a worse performance in terms of software. In this paper, we propose a new hierarchical grouping method for the VLC tables. We can obtain an index of codes in the reconstructed VLC tables by simple arithmetic operations. In this method, the VLC tables are accessed just once in decoding a symbol. We modeled the proposed algorithm in C language, compiled under ARM ADS1.2 and simulated it with Armulator. Experimental results show that the proposed algorithm reduces execution time by about 80% and 15% compared with the H.264/AVC reference program JM(Joint Model) 10.2 and the arithmetic operation algorithm which is recently proposed, respectively.

An Efficient Inter-Prediction Hardware Architecture Design for the H.264/AVC Baseline Profile Decoder (H.264/AVC 베이스라인 프로파일 디코더의 효율적인 인터예측 하드웨어 구조 설계)

  • Jin, Xianzhe;Ryoo, Kwang-Ki
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.12
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    • pp.3653-3659
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    • 2009
  • Inter-prediction is always the main bottleneck in H.264/AVC baseline profile. This paper describes an efficient inter-prediction hardware architecture design. H.264/AVC decoder supports various block types but reference software considers only the $4{\times}4$ block when the reference block is being fetched. This causes duplicated pixels which needs extra fetch cycles. In order to eliminate some of the duplicated pixels, the $8{\times}8$ and $4{\times}4$ blocks were considered in the previous design. If the block size is larger than or equal to the $8{\times}8$ block, it will be decomposed into several $8{\times}8$ blocks and if the block size is smaller than the $8{\times}8$ block it will be decomposed into several $4{\times}4$ blocks. Comparing with the reference software, the maximum and minimum cycle reduction of the previous design are 41.5% and 28.2% respectively. For further reduction of the fetch cycles, the various block types are considered in this paper. As a result, the maximum cycle reduction is 18.6% comparing with the previous design.

An Improved Motion/Disparity Vector Prediction for Multi-view Video Coding (다시점 비디오 부호화를 위한 개선된 움직임/변이 벡터 예측)

  • Lim, Sung-Chang;Lee, Yung-Lyul
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.45 no.2
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    • pp.37-48
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    • 2008
  • Generally, a motion vector and a disparity vector represent the motion information of an object in a single-view of camera and the displacement of the same scene between two cameras that located spatially different from each other, respectively. Conventional H.264/AVC does not use the disparity vector in the motion vector prediction because H.264/AVC has been developed for the single-view video. But, multi-view video coding that uses the inter-view prediction structure based on H.264/AVC can make use of the disparity vector instead of the motion vector when the current frame refers to the frame of different view. Therefore, in this paper, we propose an improved motion/disparity vector prediction method that consists of global disparity vector replacement and extended neighboring block prediction. From the experimental results of the proposed method compared with the conventional motion vector prediction of H.264/AVC, we achieved average 1.07% and 1.32% of BD (Bjontegaard delta)-bitrate saving for ${\pm}32$ and ${\pm}64$ of global vector search range, respectively, when the search range of the motion vector prediction is set to ${\pm}16$.