• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.10C
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• pp.983-991
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• 2009

While H.264/AVC is in wide use for multimedia applications such as DMB and IPTV service, we have limited usage cases for embedded real-time applications due to its high computational demand. The paper provides judicious guide line for optimization method selection, by presenting the detailed experiments data through the development process of a real time H.264 software encoder on embedded DSP. The experimental analysis includes an intensive profiling analysis, fast algorithm application, optimal memory assignment, and intrinsic-based instruction selection. We have realized a real-time software that encodes CIF resolution videos 15 fps on TMS320DM64x processors.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.48 no.1
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• pp.64-70
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• 2011

In an H.264/AVC video encoder, the motion estimation at fractional pixel accuracy improves a coding efficiency and image quality. However, it requires additional computation overheads for fractional search and interpolation, and thus, reducing the computation complexity of fractional search becomes more important. This paper proposes a Pixel Re-composition Fractional Motion Estimation (PRFME) algorithm for an H.264/AVC video encoder. Fractional Motion Estimation performs interpolation for the overlapped pixels which increases the computational complexity. PRFME can reduce the computational complexity by eliminating the overlapped pixel interpolation. Compared with the fast full search, the proposed algorithm can reduce 18.1% of computational complexity, meanwhile, the maximum PSNR degradation is less than 0.067dB. Therefore, the proposed PRFME algorithm is quite suitable for mobile applications requiring low power and complexity.

• Journal of the Semiconductor & Display Technology
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• v.12 no.3
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• pp.13-18
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• 2013

Motion estimation is a key technique of modern video processing that significantly improves the coding efficiency significantly by exploiting the temporal redundancy between successive frames. Thread-level parallelism is a promising method to accelerate the motion estimation process for multithreading general-purpose processors. In this paper, we propose a parallel motion estimation algorithm which parallelizes the motion search process of the current H.264/AVC encoder. The proposed algorithm is implemented using the OpenMP application programming interface (API) and can be easily integrated into the current encoder. The experimental results show that the proposed parallel algorithm can reduce the processing time of the motion estimation up to 65.08% without any penalty in the rate-distortion (RD) performance.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.4 s.316
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• pp.8-16
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• 2007

For the improvement of coding efficiency, the H.264/AVC video coding standard employs new coding tools compared with existing coding standards. However, due to these new coding tools, the complexity of K264/AVC standard encoder is greatly increased. Specifically, the inter/intra mode decision method using RDO(rate-distortion optimization) technique is one of the most complex parts in H.264/AVC. In this paper, we focus on the complexity reduction in macroblock mode decision. In the proposed method, we reduce the complexity of the $4{\times}4$ mode decision process using $4{\times}4$ simple square filters, and using spatial block correlation method. Additionally, exploiting the best mode of sub_macroblock in $Inter8{\times}8$ mode, we proposed an algorithm to eliminate some intra modes in current macroblock mode decision process. In addition, we employed a method to raise the probability to select SKIP, $Intra16{\times}16$, and $Intra16{\times}16$ modes which usually show low complexity and low bitrate compared with other modes. From the simulation results, the proposed algorithm reduce the encoding time by maximum 83% of total, and reduce the bitrate of the overall sequences by $8{\sim}10%$ on the average compared with existing coding methods.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.4
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• pp.771-777
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• 2012

This paper proposes a binary arithmetic encoder of CABAC using a Common Operation Unit including the three modes. The binary arithmetic encoder performing arithmetic encoding and renormalizer can be simply implemented into a hardware architecture since the COU is used regardless of the modes. The proposed binary arithmetic encoder of CABAC includes Context RAM, Context Updater, Common Operation Unit and Bit-Gen. The architecture consists of 4-stage pipeline operating one symbol for each clock cycle. The area of proposed binary arithmetic encoder of CABAC is reduced up to 47%, the performance of proposed binary arithmetic encoder of CABAC is 19% higher than the previous architecture.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.729-730
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• 2006

multimedia applications has been targeted for exploiting single instruction multiple data extensions to instruction architectures for the most of the modern microprocessor. In this paper, the newest video coding standard, H.264/AVC baseline profile decoder has been implemented and optimized exploiting INTEL MMX technology to show the overall system speedup by the SIMD style coding

• Journal of Broadcast Engineering
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• v.17 no.6
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• pp.1091-1105
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• 2012

In this paper, we analyzed statistical characteristics and complexity of HEVC encoder as a leading research of acceleration, optimization and parallelization. Computational complexity of the HEVC encoder is approximately twice the compression performance compared to H.264/AVC. But, the increase of encoder complexity remains a problem to be solved in the future. Before performing the research on acceleration, optimization and parallelization to reduce high complexity of HEVC encoder, we measure the complexity each module for HEVC encoder using it's reference software HM 7.1. We also measured the predicted complexity of fast HEVC encoder software, used in real applications, using HM 7.1 applying fast encoding method. The complexity is measured in terms of the operating cycle of the encoder software under the common test sequences and conditions in the Windows PC environment. In addition, we analyze statistical characteristics of HEVC encoder software according to encoding structures and limitation using coded bitstreams.

• Journal of Broadcast Engineering
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• v.14 no.2
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• pp.219-227
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• 2009

In H.264/AVC, if each block is quantized with a adaptive quantization parameter(QP) regardless of the characteristics of a block, it could be the deterioration of the picture quality. In this paper, an adaptive block-based QP selection method is proposed in order to improve picture quality by utilizing the bit amounts of the zigzag-scanned integer transform coefficients of the neighboring blocks and changing the QP value in the current block. The proposed method works in the same way as the encoder and decoder without transmitting the change of QP value to the decoder side. The experimental results show that the proposed method achieves a gain of about $0.1\sim0.3dB$ compared with H.264/AVC.

• Journal of IKEEE
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• v.17 no.3
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• pp.352-359
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• 2013

This paper proposes an entropy coding unit for H.264/AVC baseline profile. Entropy coding requires code tables for macroblock encoding. There are patterns in codewords of each code tables. In this paper, the patterns between codewords are analyzed to reduce the hardware cost. The entropy coding unit consists of Exp-Golomb unit and CAVLC unit. The Exp-Golomb unit can process five code types in a single unit. It can perform Exp-Golomb processing using only two adders. While typical CAVLC units use various code tables which require large amounts of resources, the sizes of the tables are reduced to about 40% or less of typical CAVLC units using relationships between table elements in the proposed CAVLC unit. After the Exp-Golomb unit and the CAVLC unit generate code values, the entropy unit uses a small size shifter for bit-stream generation while typical methods are barrel shifters.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.6C
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• pp.450-458
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• 2008

In this paper, we propose a real-time stereoscopic display system based on H.264/AVC. We initially acquire stereo-view images from stereo web-cam using OpenCV library. The captured images are converted to YUV 4:2:0 format as a preprocess. The input files are encoded by stereo-encoder, which has a proposed estimation structure, with more than 30 fps. The encoded bitstream are decoded by stereo-decoder reconstructing left and right images. The reconstructed stereo images are postprocessed by stereoscopic image synthesis technique to offer users more realistic images with 3D effect. Experimental results show that the proposed system has better encoding efficiency compared with using a conventional stereo CODEC(coder and decoder) and operates with real-time processing and low complexity suitable for an application with a mobile environment.