• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.453-454
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• 2011

본 논문에서는 벅-부스트와 포워드 컨버터의 기능을 갖는 컨버터를 제안한다. 제안하는 컨버터는 Cascaded H-bridge 멀티레벨인버터와 같이 다수의 독립된 전원을 요구하는 회로 구조를 단일 입력 전원단으로 구성할 수 있는 특징을 가진다. 벅-부스트 컨버터의 입력 인덕터는 변압기로 대체되며 컨버터 스위치의 ON 동작시 포워드 동작에 의해 변압기 2차측으로 전력전달이 이루어지며, 스위치 OFF시 변압기 1차측 자화인덕턴스에 저장된 에너지가 비절연된 벅-부스트 컨버터의 출력 커패시터로 전달된다. 제안된 컨버터의 동작 모드에 따른 이론적 분석을 시행하고 시뮬레이션을 통해 타당성을 검증한다.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.455-456
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• 2011

본 논문에서는 Boost 컨버터와 Forward 컨버터를 조합한 컨버터를 제안한다. 제안하는 컨버터는 시스템 구성상 다수의 독립된 전원을 요구하는 Cascaded H-bridge 멀티레벨인버터와 같은 회로구조에 있어 다수의 독립전원의 확보가 곤란한 경우 단일 입력 전원단으로 시스템을 구성할 수 있는 특징을 가진다. Boost 컨버터의 입력 인덕터는 변압기로 대체되며 컨버터 스위치의 ON 동작시 변압기 일차측 자화인덕턴스에 저장된 에너지가 변압기 이차측과 비절연된 Boost 컨버터의 출력 커패시터로 전달된다. 제안된 컨버터의 동작 모드에 따른 이론적 분석을 시행하고 시뮬레이션을 통해 타당성을 검증한다.

• Journal of Power Electronics
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• v.16 no.2
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• pp.399-413
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• 2016

This paper presents a topology for a modular power electronic transformer (PET) and a control scheme. The proposed PET consists of a cascaded H-Bridge rectifier on the primary side, a high-frequency DC/DC conversion cell in the center, and a cascaded H-Bridge inverter on the secondary side. It is practical to use PETs in power systems to reduce the cost, weight and size. A detailed analysis of the structure is carried out by using equivalent circuit. An algorithm to control the voltages of each capacitor and to maintain the power flow in the PET is established. The merits are analyzed and verified in theory, including the bi-directional power flow, variable voltage/frequency and high power factor on the primary side. The experimental results validated the propose structure and algorithm.

• Journal of Power Electronics
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• v.19 no.3
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• pp.727-743
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• 2019

This paper presents a pulse-width modulation strategy to eliminate the common mode voltage (CMV) with reduced CMV spikes in multilevel inverters since a high CMV magnitude and its fast variations dv/dt result in bearing failure of motors, overvoltage at motor terminals, and electromagnetic interference (EMI). The proposed method only utilizes the zero CMV states in a space vector diagram and it is implemented by a carrier-based pulse-width modulation (CBPWM) method. This method is generalized for odd number levels of inverters including neutral-point-clamped (NPC) and cascaded H-bridge inverters. Then it is extended to the over-modulation mode. The over-modulation mode is implemented by using the two-limit trajectory principle to maintain linear control and to avoid look-up tables. Even though the CMV is eliminated, CMV spikes that can cause EMI and bearing current problems still exist due to the deadtime effect. As a result, the deadtime effect is analyzed. By taking the deadtime effect into consideration, the proposed method is capable of reducing CMV spikes. Simulation and experimental results verify the effectiveness of the proposed strategy.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.105-107
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• 2018

This paper presents a new hybrid multilevel converter topology, which consists of a combination of the series connected switched capacitor units with boost ability, and an H-bridge with T-type bidirectional switches. The proposed converter boosts the input voltage without any bulky inductors, and has the small number of components, which can make the size and cost of a power converter greatly reduced. The output filter size and harmonics are also reduced by the high quality multilevel output. In addition, there is no need for complicated methods to balance the capacitor voltage. Simulation and experimental results with a nine-level converter system are presented to validate the proposed topology and modulation method.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.70-71
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• 2017

This paper presents a new cascaded boost multilevel converter topology for distributed generation (DG) systems. Most of DG systems, such as photovoltaic (PV), wind turbine and fuel cells, normally require the complex structure power converters, which makes the system expensive, complex and hard to control. However, the proposed converter topology can generate a much higher output voltage just by using the standard low-voltage switch devices and low voltage DC-sources in a simplified structure, also enhancing the reliability of the switch devices. Simulation and experimental results with a 1.2kW system are presented to validate the proposed topology and control method.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.2
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• pp.209-215
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• 2018

This paper present a 7-level PWM inverter adopting voltage balancing control to series-connected input capacitors. The prior proposed 7-level PWM inverter consists of dc input source, three series-connected capacitors, two bidirectional switch modules, and an H-bridge. This circuit topology is useful to increase the number of output voltage levels, however it fails to generate 7-level in output voltage without consideration for voltage balancing among series-connected capacitors. Capacitor voltage imbalance is caused on the different period between charging and discharging of capacitor. To solve this problem, we uses the amplitude modulation of carrier wave, which is used to produce the center output voltage level. To verify the validity of the proposed control method, we carried out computer-aided simulation and experiments using a prototype.

• Proceedings of the KIPE Conference
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• 2016.07a
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• pp.91-92
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• 2016

본 논문에서는 1:3:9의 비대칭 입력전원을 갖는 H-bridge 모듈 3개를 직렬 결합하여 27-레벨의 단상 220V 출력전압을 생성할 수 있는 가정용 멀티레벨인버터 기반 PCS 시제품을 개발하였다. 가정용 멀티레벨인버터의 부하별 출력전압 및 출력전류, 전력변환 효율과 THD를 측정, 분석하였다.

• Proceedings of the KIEE Conference
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• 2005.04a
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• pp.55-57
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• 2005

This paper deals with the analysis of bearing current in H-bridge seven level multilevel inverter fed induction motor. In the previous researches utilized electromagnetic equations to derive the parasitic capacitance or measured capacitance parameters, but we used FEM to derive parasitic capacitances and defined the equivalent circuit parameters in our strategy. Then we compared suggested method with conventional method in 60 [Hz] no load condition.

• Journal of Power Electronics
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• v.17 no.5
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• pp.1186-1194
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• 2017

This paper proposes an improved low frequency Selective Harmonic Mitigation-PWM (SHM-PWM) technique. The proposed method mitigates the low order harmonics of the output voltage up to the $50^{th}$ harmonic well and satisfies the grid codes EN 50160 and CIGRE-WG 36-05. Using a modified criterion for the switching angles, the range of the modulation index for non-linear SHM equations is improved, without increasing the switching frequency of the CHB converter. Due to the low switching frequency of the CHB converter, mitigating the harmonics of the converter up to the $50^{th}$ order and finding a wider modulation index range, the size and cost of the passive filters can be significantly reduced with the proposed technique. Therefore, the proposed technique is more efficient than the conventional SHM-PWM. To verify the effectiveness of the proposed method, a 7-level Cascaded H-bridge (CHB) converter is utilized for the study. Simulation and experimental results confirm the validity of the above claims.