• Title/Summary/Keyword: Ground Interconnection Networks

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Taylor′s Series Model Analysis of Maximum Simultaneous Switching Noise for Ground Interconnection Networks in CMOS Systems (CMOS그라운드 연결망에서 발생하는 최대 동시 스위칭 잡음의 테일러 급수 모형의 분석)

  • 임경택;조태호;백종흠;김석윤
    • Proceedings of the IEEK Conference
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    • 2001.06b
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    • pp.129-132
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    • 2001
  • This paper presents an efficient method to estimate the maximum SSN (simultaneous switching noise) for ground interconnection networks in CMOS systems using Taylor's series and analyzes the truncation error that has occurred in Taylor's series approximation. We assume that the curve form of noise voltage on ground interconnection networks is linear and derive a polynomial expression to estimate the maximum value of SSN using $\alpha$-power MOS model. The maximum relative error due to the truncation is shown to be under 1.87% through simulations when we approximate the noise expression in the 3rd-order polynomial.

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An Analytical Model of Maximum Simultaneous Switching Noise for Ground Interconnection Networks in CMOS Systems (CMOS 그라운드 연결망에서의 최대 동시 스위칭 잡음의 해석 모형)

  • Kim, Jung-Hak;Baek, Jong-Humn;Kim, Seok-Yoon
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.50 no.3
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    • pp.115-119
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    • 2001
  • This paper presents an efficient and simple method for analyzine maximum simultaneous switching noise (SSN) on ground interconnection networks in CMOS systems. For the derivation of maximum SSN expression, we use ${\alpha}$-power law MOS model and Taylor's series approximation. The accuracy of the proposed method is verified by comparing the results with those of previous researches and HSPICE simulations under the contemporary process parameters and environmental conditions. The proposed method predicts the maximum SSN values more accurately when compared to existing approaches even in most practical cases such that exist some output drivers not in transition.

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Estimation of Maximum Simultaneous Switching Noise for Ground Interconnection Networks in CMOS Systems (CMOS그라운드 연결망에서의 최대 동시 스위칭 잡음 해석 방법)

  • 임경택;백종흠;김석윤
    • Proceedings of the IEEK Conference
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    • 2000.11b
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    • pp.51-54
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    • 2000
  • This paper presents an efficient method for estimating maximum simultaneous switching noise(SSN) of ground interconnection networks in CMOS systems. For the derivation of maximum SSN expression we use a-power law MOS model and an iterative method to reduce error that may occur due to the assumptions used in the derivation process. The accuracy of the proposed method is verified by comparing the results with those of previous researches and HSPICE simulations under the present process parameters and environmental conditions. Our method predicts the maximum SSN values more accurately as compared to existing approaches even in more practical cases such that there exist some of output drivers not in transition.

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