• Proceedings of the Korean Society of Precision Engineering Conference
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• 2002.10a
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• pp.616-619
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• 2002

The z-map structure is widely used for NC tool path verification as it is very simple and fast in calculation of Boolean operations. However, if the number of the x-y grid points in a z-map is increased to enhance its accuracy, the computation time for NC verification increases rapidly. To reduce this computation time, we proposed a NC verification method using 3-D graphic acceleration hardwares. In this method, the z-map of the resultant workpiece machined by a NC program is obtained by rendering tool swept volumes along tool pathos and reading the depth buffer of the graphic card. The experimental results show that this hardware-based method is faster than the conventional software-based method.

• Journal of KIISE:Computer Systems and Theory
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• v.33 no.11
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• pp.853-858
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• 2006

In this paper, we propose a practical method for hardware-accelerated rendering of the depth image-based representation(DIBR) of 3D graphic object using graphic processing unit(GPU). The proposed method overcomes the drawbacks of the conventional rendering, i.e. it is slow since it is hardly assisted by graphics hardware and surface lighting is static. Utilizing the new features of modem GPU and programmable shader support, we develop an efficient hardware-accelerating rendering algorithm of depth image-based 3D object. Surface rendering in response of varying illumination is performed inside the vertex shader while adaptive point splatting is performed inside the fragment shader. Experimental results show that the rendering speed increases considerably compared with the software-based rendering and the conventional OpenGL-based rendering method.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.2116-2120
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• 2003

A frame buffer device is an abstraction for the graphic hardware. It allows application software to access the graphic hardware through a well-defined interface, so that the software doesn’t need to know anything about the low-level interface stuff. We develop a frame buffer driver for VIA’s CLE266 graphic system based on ‘Qplus’, an embedded linux operating system developed by ETRI. Then, it will be seen that our frame buffer system is applied to embedded solutions such as movie player and X server successfully.

• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.120-120
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• 2000

In this study, in order to control real system under the environment of graphic user interface, study on the technique which can control real system without additional hardware drivers using virtual machine driver operated on the windows operating system. Consider the problem which is the error and the delay of a sampling time on the multi task processing through the load test of the experiment using graphic user interface.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.12
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• pp.2675-2680
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• 2010

Computation steps for 3D graphic processing consist of two stages - fixed operation stage and programming required stage. Using this characteristic of 3D pipeline, a hybrid structure between graphics hardware designed by fixed structure and programmable hardware based on instructions, can handle graphic processing more efficiently. In this paper, fragment Shader is designed under this hybrid structure. It also supports OpenGL ES 2.0. Interior interface is optimized to reduce the delay of entire pipeline, which may be occurred by data I/O between the fixed hardware and the Shader. Interior register group of the Shader is designed by an interleaved structure to improve the register space and processing speed.

• 제어로봇시스템학회:학술대회논문집
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• 1993.10b
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• pp.288-292
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• 1993

This paper summerizes a prototype central control system of distribution automation system, which is a result of project carried out by KERI and 6 companies. Of the many possible systems, feeder automation oriented system is described. Control hardware system is composed of one super-mini and 2 workstations. Two kinds of commercial softwares, DBMS and graphic tools, are adopted. Three component system of the hardware has its own role, host system for DB managent, F.A. program running, communication scheduling, and etc., two workstations for communication node and graphic interface node. System management program, feeder automation program including load forcasting, communication scheduling and supervisory contorl functions are developed on the basis of above hardware and properly designed protocol, communication system and terminals.

• Journal of the Korea Institute of Military Science and Technology
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• v.5 no.2
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• pp.72-82
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• 2002

This paper presents the design technology of a Graphic Generator which drives the embedded aircraft display equipments such as HUD(Head-Up Display) and MFD (Multi-Function Display) those provide pilot with the most important mission information. The main issue of this design is how we can implement the real-time embedded graphic generator using a general purpose processor as a substitute for the obsolete the production of specific graphic processor in the military market. So we proposed two kinds of method that one is a software solution so called graphic kernel system, interpreting the display file, controlling the graphic system and pre-processing graphic primitives, the other is a hardware solution so called graphic engine, interpreting passed commands through the graphic kernel system, post-processing the looping calculation taking much of time as implemented by software. We have tested and verified the functionalities and the required performance of Graphic Generator.

• Proceedings of the KIEE Conference
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• 2002.11b
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• pp.127-130
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• 2002

Recently, with the increasing use of power semiconductors and microprocessors which are very sensitive to little change of power quality and for coping positively with anticipating power quality disputes between power providers and consumers which are possible to occur by of power market being formed, the power quality problem has gained preponderance among the contemporary research areas. To serve these purposes, the integrated system has been researched and developed for power quality analysis and monitoring, which provides speedy and powerful functions by the growth of computer hardware and information technology. But the advent of fast and lower price hardware make little difference in an application on many systems. As a result, the key issues of constructing power quality monitoring system are in the management of data obtained, accurate algorithms, graphic representation and user-friendly-environment for easy and clear analysis results. So, in this paper it will be introduced that the standard of user-friendly-GUI(Graphic User Interface) and analysis graphic representation for intuitive understanding of results from power quality analysis based on consideration of several systems currently being in use.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.9
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• pp.85-95
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• 2008

Characteristically, 3D graphic algorithms have to perform complex calculations on massive amount of stream data. The vertex and pixel shaders have enabled efficient execution of graphic algorithms by hardware, and these graphic processors may seem to have achieved the aim of "hardwarization of software shaders." However, the hardware shaders have hitherto been evolving within the limits of Z-buffer based algorithms. We predict that the ultimate model for future graphic processors will be an algorithm-independent integrated shader which combines the functions of both vertex and pixel shaders. We design the register file model that supports 3-dimensional computer graphic on the programmable unified shader processor. we have verified the accurate calculated value using FPGA Virtex-4(xcvlx200) made by Xilinx for operating binary files made by the implementation progress based on synthesis results.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.715-718
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• 2005

Mobile devices is getting to include more functions according to the demand of digital convergence. Applications based on 3D graphic calculation such as 3D games and navigation are one of the functions. 3D graphic calculation requires heavy calculation. Therefore, we need dedicated 3D graphic hardware unit with high performance. 3D graphic calculation needs a lot of complicated floating-point arithmetic operation. However, most of current mobile 3D graphics processors do not have efficient architecture for mobile devices because they are based on those for conventional computer systems. In this paper, we propose arithmetic units for special functions of lighting operation of 3D graphics. Transcendental arithmetic units are designed using approximation of logarithm function. Special function units for lighting operation such as reciprocal, square root, reciprocal of square root, and power can be obtained. The proposed arithmetic unit has lower error rate and smaller silicon area than conventional arithmetic architecture.