• Title/Summary/Keyword: Ge/GaAs heterojunction

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Sub-10 nm Ge/GaAs Heterojunction-Based Tunneling Field-Effect Transistor with Vertical Tunneling Operation for Ultra-Low-Power Applications

  • Yoon, Young Jun;Seo, Jae Hwa;Cho, Seongjae;Kwon, Hyuck-In;Lee, Jung-Hee;Kang, In Man
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.2
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    • pp.172-178
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    • 2016
  • In this paper, we propose a sub-10 nm Ge/GaAs heterojunction-based tunneling field-effect transistor (TFET) with vertical band-to-band tunneling (BBT) operation for ultra-low-power (LP) applications. We design a stack structure that is based on the Ge/GaAs heterojunction to realize the vertical BBT operation. The use of vertical BBT operations in devices results in excellent subthreshold characteristics with a reduction in the drain-induced barrier thinning (DIBT) phenomenon. The proposed device with a channel length ($L_{ch}$) of 5 nm exhibits outstanding LP performance with a subthreshold swing (S) of 29.1 mV/dec and an off-state current ($I_{off}$) of $1.12{\times}10^{-11}A/{\mu}m$. In addition, the use of the highk spacer dielectric $HfO_2$ improves the on-state current ($I_{on}$) with an intrinsic delay time (${\tau}$) because of a higher fringing field. We demonstrate a sub-10 nm LP switching device that realizes a good S and lower $I_{off}$ at a lower supply voltage ($V_{DD}$) of 0.2 V.

Pd/Ge/Ti/pt Ohmic contact to InGaAs for Heterojunction Bipolar Transistors(HBTs) (이종접합 쌍극자 트랜지스터(HBT)의 에미터 접촉층으로 사용되는 InGaAs에 대한 Pd/Ge/Ti/Pt의 오믹 접촉 특성)

  • 김일호;장경욱;박성호(주)가인테크
    • Journal of the Korean Vacuum Society
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    • v.10 no.2
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    • pp.219-224
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    • 2001
  • Pd/Ge/Ti/Pt ohmic contact to n-type InCaAs was investigated. Minimum specific contact resistivity of $3.7\times10^{-6}\; \Omega\textrm{cm}^2$ was achieved by rapid thermal annealing at $400^{\circ}C$ for 10 seconds. This was related to the formation of Pd-Ge compounds and the in-diffusion of Ge atoms to InGaAs surface. However, the specific contact resistivity increased slightly to $low-10^5\; \Omega\textrm{cm}^2$ in the case of longer annealing time. Superior ohmic contact and non-spiking planar interface between ohmic materials and InGaAs were maintained after annealing at high temperature. Therefore, this thermally stable ohmic contact system is a promising candidate for compound semiconductor devices.

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Evaluation of Radio-Frequency Performance of Gate-All-Around Ge/GaAs Heterojunction Tunneling Field-Effect Transistor with Hetero-Gate-Dielectric by Mixed-Mode Simulation

  • Roh, Hee Bum;Seo, Jae Hwa;Yoon, Young Jun;Bae, Jin-Hyuk;Cho, Eou-Sik;Lee, Jung-Hee;Cho, Seongjae;Kang, In Man
    • Journal of Electrical Engineering and Technology
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    • v.9 no.6
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    • pp.2070-2078
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    • 2014
  • In this work, the frequency response of gate-all-around (GAA) Ge/GaAs heterojunction tunneling field-effect transistor (TFET) with hetero-gate-dielectric (HGD) and pnpn channel doping profile has been analysed by technology computer-aided design (TCAD) device-circuit mixed-mode simulations, with comparison studies among ppn, pnpn, and HGD pnpn TFET devices. By recursive tracing of voltage transfer curves (VTCs) of a common-source (CS) amplifier based on the HGD pnpn TFET, the operation point (Q-point) was obtained at $V_{DS}=1V$, where the maximum available output swing was acquired without waveform distortion. The slope of VTC of the amplifier was 9.21 V/V (19.4 dB), which mainly resulted from the ponderable direct-current (DC) characteristics of HGD pnpn TFET. Along with the DC performances, frequency response with a small-signal voltage of 10 mV has been closely investigated in terms of voltage gain ($A_v$), unit-gain frequency ($f_{unity}$), and cut-off frequency ($f_T$). The Ge/GaAs HGD pnpn TFET demonstrated $A_v=19.4dB$, $f_{unity}=10THz$, $f_T=0.487$ THz and $f_{max}=18THz$.

Design Optimization of a Type-I Heterojunction Tunneling Field-Effect Transistor (I-HTFET) for High Performance Logic Technology

  • Cho, Seong-Jae;Sun, Min-Chul;Kim, Ga-Ram;Kamins, Theodore I.;Park, Byung-Gook;Harris, James S. Jr.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.3
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    • pp.182-189
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    • 2011
  • In this work, a tunneling field-effect transistor (TFET) based on heterojunctions of compound and Group IV semiconductors is introduced and simulated. TFETs based on either silicon or compound semiconductors have been intensively researched due to their merits of robustness against short channel effects (SCEs) and excellent subthreshold swing (SS) characteristics. However, silicon TFETs have the drawback of low on-current and compound ones are difficult to integrate with silicon CMOS circuits. In order to combine the high tunneling efficiency of narrow bandgap material TFETs and the high mobility of III-V TFETs, a Type-I heterojunction tunneling field-effect transistor (I-HTFET) adopting $Ge-Al_xGa_{1-x}As-Ge$ system has been optimized by simulation in terms of aluminum (Al) composition. To maximize device performance, we considered a nanowire structure, and it was shown that high performance (HP) logic technology can be achieved by the proposed device. The optimum Al composition turned out to be around 20% (x=0.2).