• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.1016-1018
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• 1992

A numerical model of a three junction device is presented. It allows the simulation of the external characteristics of the PNPN family devices and in this work the simulation of gate turn-off thyristor(GTO) is particularly considered. The proposed PNPN device simulation model solves all the drawbacks presented by the previous work, simulates the GTO well, and fulfills.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.36 no.1
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• pp.3-8
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• 1987

The conventional autosequentially commutated current-fed inverter (ASCI) is widely employed with the induction motor drives for speed control. Howener, this inverter has a limit of high power and high frequency indution motor drives. One of the limitations is to be found in the commutation capacitors in the main circuit of this inverter. A new current-fed gate turn-off thyristor (GTO) inverter is developed. This inverter is composed of the main GTO bridge configuration and the improved energy rebound circuit (ERC)without the commutation capacitor. This inverter works stable at high frequency from light load to heavy one. The improved ERC is used not only to rebound the load reactive power to the dc link, but also to return the power in the load to the ac source. The new GTO inverter circuit and the characteristics of the inverter induction motor drives are explained and analyzed.

• Proceedings of the KSR Conference
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• 2004.10a
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• pp.1303-1308
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• 2004

This paper proposes a reduction method for the mis-operation analysis of the DC High Speed Circuit Breaker(HSCB) in electric railway substation system. The analysis method is based on present condition of operation which is a method for accuracy level up. There is reason to operation of HSCB that it is mis-operation of fault detection relay(50F), operation of ground fault relay(64P), and trouble of electric car. A countermeasure is relay resetting through field test, induction of GTOCB(Gate Turn Off Thyristor Circuit Breaker), HSVCB(High Speed Vacuum Circuit Breaker), coordination with electric car. The results presented in the paper can be used as a reference for maintenance free in electric railway substation system.

• JOURNAL OF ELECTRICAL WORLD
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• s.297
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• pp.66-72
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• 2001

1957년에 사이리스터가 발표된 이래 파워반도체디바이스(이하 ''파워디바이스''라 한다)의 발전과 더불어 이것을 사용하여 전력변환$\cdot$제어와 이를 응용한 파워일렉트로닉스 산업도 현저한 발전을 이루어 왔다. 21세기를 맞이하여 지구의 유한성을 강하게 인식하고 자원과 에너지를 고도이용하는 순환형 사회에로의 전환을 도모하는 기술혁신과 IT(정보기술)를 구사한 기술보급의 움직임이 활발해지고, 파워일렉트로닉스와 그 키파트인 파워디바이스가 수행하여야 할 역할은 점점 더 중요해지고 있다. 이와 같은 배경 하에서 파워디바이스는 인버터제어를 주목적으로 사이리스터, GTO(Gate Turn-off Thyristor), 바이폴라트랜지스터, MOSFET(Metal Oxide Silicon Field Effect Transistor)에서 IGBT(Insulated Gate Bipolar Transistor)에로 진전되고, 그 응용분야도 가전제품에서 OA, 산업, 의료, 전기자동차, 전철, 전력에 이르는 폭넓은 분야로 확대되었다. 현재 파워디바이스를 취급하는 전력의 범위는 수W의 스위칭 전원에서 GW급의 직류송전까지 9단위까지에 이르러 광범위한 전력 제어가 가능하게 되었다. 한편 응용의 중심이 되는 IGBT는, 고속화와 저손실화 및 파괴 내량의 향상을 지향한 개량을 거듭하여 제5세대제품이 나타나기 시작하였다. 또한 IGBT에 구동$\cdot$보호$\cdot$진단 회로 등을 넣어 모듈화한 IPM(Intelligent Power Module)이 그 편리성과 소형화를 특징으로 파워디바이스의 주역의 자리에 정착하였다. 가전$\cdot$산업$\cdot$자동차$\cdot$전철의 각 분야에서는 시장 니즈에 최적 설계된 IPM이 개발되게 되어 보다 더한 시장확대가 기대되고 있다. 또한 종래의 Si(실리콘)에 대신하는 반도체 재료로서 SiC(실리콘 카바이드 : 탄화규소)에 대한 기대가 크고 MOSFET나 SBD 등의 파워디바이스의 조기실용화에의 대처노력도 주목할 만하다.

• KIEE International Transactions on Power Engineering
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• v.3A no.3
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• pp.148-154
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• 2003

This paper describes the development of KEPCO's 80MVA UPFC electromagnetic transient model and the analysis of its performance in the actual Korean power system. KEPCO's 80MVA UPFC is currently undergoing installation and will be ready for commercial operation from the year 2003. In order to apply a new FACTS device such as the UPFC to the actual power system, the utility needs, in advance, both load flow stability studies and transient studies. Therefore, KEPRI, the research institute of KEPCO, developed a detailed transient analysis model that is based on the actual UPFC S/W algorithm and H/W specifications. This simulation model is implemented by an EMTDC/PSCAD package. The results of the simulation show the effectiveness of UPFC operation in the KEPCO power system.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.310-313
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• 2002

Structures obtained with a direct boning of two FZ silicon wafers joined in such a way that a smooth surface of one wafer was attached to the grooved surface of the other were studied. A square net of grooves was made with a conventional photo lithography process. After high temperature annealing the appearance of voids and the rearrangement of structural defects were observed with X-ray diffraction topography techniques. It was shown that the formation of void free grooved boundaries was feasible. In the cases when particulate contamination was prevented, the voids appeared in the grooved structures could be eliminated with annealing. Since it was found that the flattening was accompanied with plastic deformation, this deformation was suggested to be intensively involved in the process of void removal. A model was proposed explaining the interaction between the structural defects resulted in "a dissolution" of cavities. The described processes may occur in grooved as well as in smooth structures, but there are the former that allow to manage air traps and undesirable excess of dislocation density. Grooves can be paths for air leave. According to the established mechanisms, if not outdone, the dislocations form local defect arrangements at the grooves permitting the substantial reduction in defect density over the remainder of the interfacial area.