• Journal of IKEEE
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• v.22 no.3
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• pp.522-531
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• 2018

A public-key cryptography processor EC-RSA was designed, which integrates a 224-bit prime field elliptic curve cryptography (ECC) defined in the FIPS 186-2 as well as RSA with 2048-bit key length into a single hardware structure. A finite field arithmetic core used in both scalar multiplication for ECC and exponentiation for RSA was designed with 32-bit data-path. A lightweight implementation was achieved by an efficient hardware sharing of the finite field arithmetic core and internal memory for ECC and RSA operations. The EC-RSA processor was verified by FPGA implementation. It occupied 11,779 gate equivalents (GEs) and 14 kbit RAM synthesized with a 180-nm CMOS cell library and the estimated maximum clock frequency was 133 MHz. It takes 867,746 clock cycles for ECC scalar multiplication resulting in the estimated throughput of 34.3 kbps, and takes 26,149,013 clock cycles for RSA decryption resulting in the estimated throughput of 10.4 kbps.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.3
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• pp.633-637
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• 2005

In this contribution, we developed and improved an existing GF (Galois field) dividing algorithm by suggesting a novel architecture for a finite field divider, which is frequently required for the error correction applications and the security-related applications such as the Reed-Solomon code, elliptic curve encryption/ decryption, is proposed. We utilized the VHDL language to verify the design methodology, and implemented the architecture on an FPGA chip. We suggested the n-bit lookup table method to obtain the throughput of 2m/n cycles, where m is the order of the division polynomial and n is the number of the most significant lookup-bits. By doing this, we extracted the advantages in achieving both high-throughput and less cost of the gate areaon the chip. A pilot FPGA chip was implemented with the case of m=4, n=2. We successfully utilized the Altera's EP20K30ETC144-1 to exhibit the maximum operating clock frequency of 77 MHz.

• Korea Journal of Hospital Management
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• v.25 no.1
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• pp.13-20
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• 2020

Purposes: This study has the purpose to the improvement of health promotion for local residents through delivery of high-quality medical service by improving imbalance of medical use and seeking an improvement plan for accessibility of effective medical service by understanding the pattern of medical use by region. Methodology: As for the method, this study derived results at the significance level of p<0.05 through chi square test(χ² test) and Generalized Estimating Equation(GEE) SAS 9.4 version by using the data of the 7th Korean Longitudinal Study of Ageing 2018. Findings: Study results show that local residents use medical service such as hospitalization care and outpatient visit more as compared to the residents in Gyeonggi-do/large or medium-sized cities. The more the number of chronic disease, the more they select hospitalization care rather than outpatient visit. Results also show that patients engaged in labour tend to select outpatient treatment rather than hospitalization treatment. Meanwhile, severity of disease turned out to be higher amongst medical care beneficiaries than that of national health insurance patients when comparing the types of medical security. Practical Implications: In stead of solving the problem of the difference in medical use by region from the aspect of income and economic level, an integrative solution shall be provided putting viewpoint on the social phenomenon suited to the changes of the times. This study suggests a plan for using a health and medical community care center that acts as a gate keeper of regional medical service.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.12C
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• pp.1193-1200
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• 2005

In this paper, we proposed an image hiding method which decreases the amount of calculation encrypting partial data rather than the whole image data using a discrete wavelet transform and a linear scalar quantization which have been adopted as the main technique in JPEG2000 standard and then implemented the proposed algorithm to hardware. A chaotic system was used instead of encryption algorithms to reduce further amount of calculation. It uses a method of random changing method using the chaotic system of the data in a selected subband. For ciphering the quantization index it uses a novel image encryption algorithm of cyclical shifting to the right or left direction and encrypts two quantization assignment method (Top-down coding and Reflection coding), made change of data less. The experiments have been performed with the proposed methods implemented in software for about 500 images. The hardware encryption system was synthesized to find the gate-level circuit with the Samsung $0.35{\mu}m$ Phantom-cell library and timing simulation was performed, which resulted in the stable operation in the frequency above 100MHz.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.3
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• pp.943-950
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• 2010

A secure entrance system is complicated because it should have various functions like monitoring, logging, tracing, authentication, authorization, staff locating, managing staff enter-and-leave, and gate control. In this paper, we built and applied a secure entrance system for a domestic nuclear plant using Aspect Oriented Programming(AOP) and design pattern. Using AOP has an advantage of clearly distinguishing the role for each functional module because building a system separated independently from the system's business logic and security logic is possible. It can manage system alternation flexibility by frequent change of external environment, building a more flexible system based on increased code reuse, efficient functioning is possible which is an original advantage of AOP. Using design pattern enables to design by structuring the complicated problems that arise in general software development. Therefore, the safety of the system can also be guaranteed.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.23 no.12
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• pp.1609-1617
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• 2019

Described in this paper is a design of hardware accelerator for implementing public-key cryptographic protocols (PKCPs) based on Elliptic Curve Cryptography (ECC) and RSA. It supports five elliptic curves (ECs) over GF(p) and three key lengths of RSA that are defined by NIST standard. It was designed to support four point operations over ECs and six modular arithmetic operations, making it suitable for hardware implementation of ECC- and RSA-based PKCPs. In order to achieve small-area implementation, a finite field arithmetic circuit was designed with 32-bit data-path, and it adopted word-based Montgomery multiplication algorithm, the Jacobian coordinate system for EC point operations, and the Fermat's little theorem for modular multiplicative inverse. The hardware operation was verified with FPGA device by implementing EC-DH key exchange protocol and RSA operations. It occupied 20,800 gate equivalents and 28 kbits of RAM at 50 MHz clock frequency with 180-nm CMOS cell library, and 1,503 slices and 2 BRAMs in Virtex-5 FPGA device.

• Journal of Korean Society of Disaster and Security
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• v.14 no.2
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• pp.61-75
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• 2021

Recently, as the occurrence frequency of sudden floods due to climate change increased and the aging of the existing spillway, it is necessary to establish a plan to utilize an auxiliary spillway to minimize the flood damage of downstream rivers. Most studies have been conducted on the review of flow characteristics according to the operation of auxiliary spillway through the hydraulic experiments and numerical modeling. However, the studies on examination of flood damage in the downstream rivers and the stability of the revetment according to the operation of the auxiliary spillway were relatively insufficient in the literature. In this study, the stability of the revetment on the downstream river according to the outflow conditions of the existing and auxiliary spillway was examined by using 3D numerical model, FLOW-3D. The velocity, water surface elevation and shear stress results of FLOW-3D were compared with the permissible velocity and shear stress of design criteria. It was assumed the sluice gate was fully opened. As a result of numerical simulations of various auxiliary spillway operations during flood season, the single operation of the auxiliary spillway showed the reduction effect of maximum velocity and the water surface elevation compared with the single operation of the existing spillway. The stability of the revetment on downstream was satisfied under the condition of outflow less than 45% of the design flood discharge. However, the potential overtopping damage was confirmed in the case of exceeding the 45% of the design flood discharge. Therefore, the simultaneous operation with the existing spillway was important to ensure the stability on design flood discharge condition. As a result of examining the allocation ratio and the total allowable outflow, the reduction effect of maximum velocity was confirmed on the condition, where the amount of outflow on auxiliary spillway was more than that on existing spillway. It is because the flow of downstream rivers was concentrated in the center due to the outflow of existing spillway. The permissible velocity and shear stress were satisfied under the condition of less than 77% of the design flood discharge with simultaneous operation. It was found that the flood damage of downstream rivers can be minimized by setting the amount allocated to the auxiliary spillway to be larger than the amount allocated to the existing spillway for the total outflow with simultaneous operation condition. However, this study only reviewed the flow characteristics around the revetment according to the outflow of spillway under the full opening of the sluice gate condition. Therefore, the various sluice opening conditions and outflow scenarios will be asked to derive more efficient utilization of the auxiliary spillway in th future.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.9C
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• pp.861-870
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• 2002

In this paper, with targeting on the drawback of RSA of operation speed, a new 1024-bit RSA cryptosystem has been proposed and implemented in hardware to increase the operational speed and perform the variable-length encryption. The proposed cryptosystem mainly consists of the modular exponentiation part and the modular multiplication part. For the modular exponentiation, the RL-binary method, which performs squaring and modular multiplying in parallel, was improved, and then applied. And 4-stage CSA structure and radix-4 booth algorithm were applied to enhance the variable-length operation and reduce the number of partial product in modular multiplication arithmetic. The proposed RSA cryptosystem which can calculate at most 1024 bits at a tittle was mapped into the integrated circuit using the Hynix Phantom Cell Library for Hynix 0.35㎛ 2-Poly 4-Metal CMOS process. Also, the result of software implementation, which had been programmed prior to the hardware research, has been used to verify the operation of the hardware system. The size of the result from the hardware implementation was about 190k gate count and the operational clock frequency was 150㎒. By considering a variable-length of modulus number, the baud rate of the proposed scheme is one and half times faster than the previous works. Therefore, the proposed high speed variable-length RSA cryptosystem should be able to be used in various information security system which requires high speed operation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.4
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• pp.795-803
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• 2017

This paper describes a dual-standard cryptographic processor that efficiently integrates two block ciphers ARIA and AES into a unified hardware. The ARIA-AES crypto-processor was designed to support 128-b and 256-b key sizes, as well as four modes of operation including ECB, CBC, OFB, and CTR. Based on the common characteristics of ARIA and AES algorithms, our design was optimized by sharing hardware resources in substitution layer and in diffusion layer. It has on-the-fly key scheduler to process consecutive blocks of plaintext/ciphertext without reloading key. The ARIA-AES crypto-processor that was implemented with a $0.18{\mu}m$ CMOS cell library occupies 54,658 gate equivalents (GEs), and it can operate up to 95 MHz clock frequency. The estimated throughputs at 80 MHz clock frequency are 787 Mbps, 602 Mbps for ARIA with key size of 128-b, 256-b, respectively. In AES mode, it has throughputs of 930 Mbps, 682 Mbps for key size of 128-b, 256-b, respectively. The dual-standard crypto-processor was verified by FPGA implementation using Virtex5 device.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.20 no.5
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• pp.591-598
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• 2019

The statistics of committing suicide in S. Korea is ranked in top with serious attempts of falling among OECD countries since 2003. The rates is slightly dropped by 5 percent point, nevertheless the falling is still high for the age of over 10 years old and this matter must be solved. Most of the case of suicides are the falling based on a trend view of falling which is serious matter and cannot be solved easily for both domestic and foreign countries. For example, the steel net of falling prevent was installed in the Golden Gate Bridge costed by 200 million-dollar. In New Zealand, the steel net of falling prevention had been removed and re-installed beccause of the high suicide rates. Canada and Australia also surrounded the bridge with steel fences to prevent suicide without consideration of the beauty of bridge. Therefore, this paper suggested a comparison study on both falling prevention systems in all countries and patent technologies. Also, it covers the blocking skills of approach in both security and limited area. This paper suggested the technical Rollinder system equipped with the mechanical apprentice to prevent effectively the falling sucides and wall passing. Before the installation of Rollinder System by 2016, there were 33 person who tried to fall in the river in Machang Bridge. However, the number of the committing suicides were dramatically reduced to zero after the installation of the system.