• Title/Summary/Keyword: Gate Design

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K-band MMIC Oscillator Design Using the PHEMT (PHEMT소자를 이용한 K-band MMIC 발진 설계)

  • 이지형;채연식;조희철;윤용순;이진구
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.88-91
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    • 2000
  • An MMIC oscillator operating at the 24.55 GHz has been designed using 0.2 ${\mu}{\textrm}{m}$AlGaAs/InGaAs/GaAs Pseudomorphic HEMT technology. The active device used in the oscillator design has a 0.2 ${\mu}{\textrm}{m}$ gate length PHEMT with 4$\times$80 ${\mu}{\textrm}{m}$ gate width. We obtained 4.08 dB of S$_{21}$ gain and 317 mS/mm of transconductance, and extrapolated unit current gain cut-off frequency (f$_{T}$) and maximum oscillation frequency (fmax) were 62 GHz and 120 GHz, respectively. The circuit are based on a series feedback and negative resistance topology. Microstrip line open stub is used to terminating. The oscillator circuits has designed for delivering maximum power to load and conjugated matching. The simulated small signal negative resistance was 50 Ω. We obtained 1.002 of loop gain and 0.0005$^{\circ}$angle from the simulation by HP libra 6.1. The layout for oscillator is 1.2$\times$1.8 $\textrm{mm}^2$.>.

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Optimization of InAlAs/InGaAs HEMT Performance for Microwave Frequency Applications and Reliability

  • Gupta, Ritesh;Aggarwal, Sandeep Kumar;Gupta, Mridula;Gupta, R.S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.4 no.3
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    • pp.240-249
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    • 2004
  • In the present paper efforts have been made to optimize InAlAs/InGaAs HEMT by enhancing the effective gate voltage ($(V_c-V_off)$) using pulsed doped structure from uniformly doped to delta doped for microwave frequency applications and reliability. The detailed design criteria to select the proper design parameters have also been discussed in detail to exclude parallel conduction without affecting the del ice performance. Then the optimized value of $V_c-V_off$and breakdown voltages corresponding to maximum value of transconductance has been obtained. These values are then used to predict the transconductance and cut-off frequency of the del ice for different channel depths and gate lengths.

FPGA Implementation of LSB-Based Steganography

  • Vinh, Quang Do;Koo, Insoo
    • Journal of information and communication convergence engineering
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    • v.15 no.3
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    • pp.151-159
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    • 2017
  • Steganography, which is popular as an image processing technology, is the art of using digital images to hide a secret message in such a way that its existence can only be discovered by the sender and the intended receiver. This technique has the advantage of concealing secret information in a cover medium without drawing attention to it, unlike cryptography, which tries to convert data into something messy or meaningless. In this paper, we propose two efficient least significant bit (LSB)-based steganography techniques for designing an image-based steganography system on chip using hardware description language (HDL). The proposed techniques manipulate the LSB plane of the cover image to embed text inside it. The output of these algorithms is a stego-image which has the same quality as that of the original image. We also implement the proposed techniques using the Altera field programmable gate array (FPGA) and Quartus II design software.

High Voltage IGBT Improvement of Electrical Characteristics (고내압 IGBT의 전기적 특성 향상에 관한 연구)

  • Ahn, Byoung-Sup;Chung, Hun-Suk;Jung, Eun-Sik;Kim, Seong-Jong;Kang, Ey-Goo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.25 no.3
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    • pp.187-192
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    • 2012
  • Development of new efficient, high voltage switching devices with wide safe operating area and low on-state losses has received considerable attention in recent years. One of those structures with a very effective geometrical design is the trench gate Insulated Gate Bipolar Transistor(IGBT).power IGBT devices are optimized for high-voltage low-power design, decided to aim. Class 1,200 V NPT Planer IGBT, 1,200 V NPT Trench IGBT for class has been studied.

A Study on the Emotional Characteristic of Traditional Space through Borrowed Landscape (차경기법을 통한 전통공간에서의 감성특성 연구)

  • Oh, Young-Keun
    • Korean Institute of Interior Design Journal
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    • v.22 no.4
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    • pp.78-85
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    • 2013
  • This study employed the Semantic Differential(SD) technique for an empirical analysis of the borrowed landscape-the so-called interaction of landscape between space and nature-in traditional Korean space against the cultural backdrop of confucian ideology. Its findings are as follows: First, the study conducted a comparative analysis of the borrowed landscape between Sarangchae(Men's quarters) and Anchae(Women's quarters) and between Soteuldaemun(A lofty gate) and Sadangdaemun(A gate to an ancestral shrine), using the SD technique. Consequently, their marked distinction in the borrowed landscape were found to illustrate the influence of confucian ideology over spatial composition. Second, both the garden and the sky of Sarangchae appeared more open and dynamic, and soft, and comfortable, and warm compared to Anchae. Also, Soteuldaemun looked more open and dynamic than Sadangdaemun. In conclusion, traditional Korean space applies a monistic view of the world to nature and human beings, thereby embodying a philosophical and aesthetic space where humans enjoy their life in harmony with nature while playing with the landscape in a traditional space.

A Study on Bubbles in The RIM Process (림성형 공정의 기포에 관한 연구)

  • 양화준;강대원;강영중;김성준;장태식;이일엽
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2001.04a
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    • pp.303-306
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    • 2001
  • To shorten the delivery time for new products, a lot of prototype plastic parts manufacturing technologies have been developed including injection molding, vacuum casting, thermal forming and so on. Among them, RIM is becoming one of a important soft tooling methods to produce prototype and mass production parts within short time. Further more, as the rapid prototyping technology based tooling methods are playing an important role in prototype manufacturing industry, the utility of the RIM is increasing. But few analyses and mold design techniques have been developed so far due to its chemical and mechanical complexity during the packing and curing process. This research suggests mold gate design criteria to prevent bobbles from molded parts through simplified mathematical model and change of bubble sizes according to the geometry of the molded parts through experiments. Also this study shows the differences of bobble generation mechanism between RIM and injection molding.

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A Study on walking circumstance of school zone way -In Gumi city elementary school- (어린이 보호구역내 통학로의 보행환경에 관한 연구 -구미시 초등학교를 중심으로-)

  • An, Hui-uk;Lee, Jae Rim
    • The Journal of Sustainable Design and Educational Environment Research
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    • v.8 no.2
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    • pp.12-21
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    • 2009
  • The purpose of this study is to suggest a scheme to provide children safer and more comfortable walking circumstances by survey current walking circumstances of school zone ways. First, to avoid pedestrian roads being interrupted and to expand waiting space near school zone ways, several measures are needed including fixing roads, using schools' unemployed spaces and building additional gateway. Second, pedestrian crossings in front of school gate should be located at least 23.16m away from the left side of the gate. Third, on narrow path which cross main streets, the interval of pedestrian signal should be extended as against of the moment. And traffic calming facilities should be built on accurate position. Fourth, to secure pedestrians' safety and field of view, trees lining streets and any obstacles located within 10m from bus stop sign should be removed. Finally, education system about school zone ways should be improved to help children get used to more complicated roads' conditions.

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Case Study for Developing Automobile Part (Steering Wheel) using Vacuum Die-Casting Mold (진공다이캐스팅 공법을 이용한 자동차용 조향장치 개발에 대한 사례연구)

  • Kwon, Hong-Kyu;Jang, Moo-Kyung
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.35 no.2
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    • pp.196-203
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    • 2012
  • When manufacturing die casting mold, generally, the casting layout design should be considered based on the relation between injection system, casting condition, gate system, and cooling system. Also, the extent or the location of product defects were differentiated according to the various relations of the above conditions. High-qualified products can be manufactured as those defects are controled by the proper modifications or the changes of die casting mold with the conditions. In this research, the proper manufacturing method was derived intensively for reducing the defect of the internal porosity of steering wheel housing which is very complicated to achieve a good mold design. The method was also derived for minimizing and for guaranteeing the product quality through the analysis of the casting problem and the deduction of alternative plans.

Wide Bandwidth GaAs FET Distributed Amplifier in Microwave Frequencies (GaAs FET 마이크로파 증폭기 (분배증폭기에서 대역폭을 증가시키는 방법을 중심으로))

  • 장익수
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.21 no.1
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    • pp.51-56
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    • 1984
  • This paper describes the analysis and design of a GaAs FET distributed amplifier connecting a series capacitor to get a super wide bandwidth by reducing the gate line attenuation constant. In this approach a design example with a 300$\mu$ gate length FET devices is presented, and the abtained results are; that without series capacitors the bandwidth is 2-12 GHz, but with capacitors 2-20 GHz in flat gain.

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Integrated Injection Logic- Design Considerations and Experimental Results (Intergrated Injection Logic - 설계에 대한 고찰과 실험결과)

  • 서광석;김충기
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.16 no.2
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    • pp.7-14
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    • 1979
  • Design considerations of I2L are discussed with particular emphasis on the upward current gain of the npn transistor, 6J Several test structures have been fabricated to measure the DC and AC characteristics of the I2L basic cell and the base current components of the npn transistor. A T flip-flop has also been designed and fabricated using the I2L technology. The upward current gain of 10 the speed -power product of the 2.6pJ/gate and the minimum propagation delay time of 36 nsec have been obtained from the test structure. The maxmum toggle frequency of the T flip -flop has been measured to be 3.5 MHz.

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