• Title/Summary/Keyword: Gate Design

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The analysis of the conversive limitation of electric energy for the gate turn on thyristor inverter (Gate turn on thyristor 역변환장치의 변환전력한계치에 대하여)

  • Hee Yung Chun
    • 전기의세계
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    • v.17 no.2
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    • pp.6-10
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    • 1968
  • The conversive limitation of electric energy for the thyristor inverter is analysed under the boundary conditions which the term of a negative inverse voltage is longer than that of the turn off time of the thyristor under commutation. It is clear that the maximum electric energy conversion is affected by the turn off time of the thyristor, the reactance of a commutation reactor, the capacity of a commutation condenser and the voltage of Direct current source. It is useful for design the thyrister invertor and the motor speed control to apply the above conclusion.

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Canal Operation Simulation of Middle Route Project

  • Fan, Jie
    • Proceedings of the Korea Water Resources Association Conference
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    • 2008.05a
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    • pp.26-32
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    • 2008
  • Middle Route Project, the largest water conveyance system in China delivers the water of Changjiang River to North China. In order to create canal operation simulation system, mathematical models are established based on the analysis of hydraulics about steady flow, unsteady flow, and check gate. By simulating the canal operation behavior, we improved the check gate control algorithm and predicted the change process of water surface and flow profile which is very valuable to actual canal operation.

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New Dynamic Logic Gate Design Method for Improved TFT Circuit Performance

  • Jeong, Ju-Young;Kim, Jae-Geun
    • Journal of Information Display
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    • v.6 no.1
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    • pp.17-21
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    • 2005
  • We explored a new way of designing dynamic logic gates with low temperature polysilicon thin film transistors to increase the speed. The proposed architecture of logic gates utilizes the structural advantage of smaller junction capacitance of thin film transistors. This method effectively blocks leakage of current through the thin film transistors. Furthermore, the number of transistors used in logic gates is reduced thereby reducing power consumption and chip area. Through HSPICE .simulation, it is confirmed that the circuit speed is also improved in all logic gates designed.

The Delay time of CMOS inverter gate cell for design on digital system (디지털 시스템설계를 위한 CMOS 인버터게이트 셀의 지연시간)

  • 여지환
    • Proceedings of the Korea Society for Industrial Systems Conference
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    • 2002.06a
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    • pp.195-199
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    • 2002
  • This paper describes the effect of substrate back bias of CMOS Inverter. When the substrate back bias applied in body, the MOS transistor threshold voltage increased and drain saturation current decreased. The back gate reverse bias or substrate bias has been widely utilized and the following advantage has suppressing subthreshold leakage, lowering parasitic junction capacitance, preventing latch up or parasitic bipolar transistor, etc. When the reverse voltage applied substrate, this paper stimulated the propagation delay time CMOS inverter.

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Optimized and Portable FPGA-Based Systolic Cell Architecture for Smith-Waterman-Based DNA Sequence Alignment

  • Shah, Hurmat Ali;Hasan, Laiq;Koo, Insoo
    • Journal of information and communication convergence engineering
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    • v.14 no.1
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    • pp.26-34
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    • 2016
  • The alignment of DNA sequences is one of the important processes in the field of bioinformatics. The Smith-Waterman algorithm (SWA) performs optimally for aligning sequences but is computationally expensive. Field programmable gate array (FPGA) performs the best on parameters such as cost, speed-up, and ease of re-configurability to implement SWA. The performance of FPGA-based SWA is dependent on efficient cell-basic implementation-unit design. In this paper, we present an optimized systolic cell design while avoiding oversimplification, very large-scale integration (VLSI)-level design, and direct mapping of iterative equations such as previous cell designs. The proposed design makes efficient use of hardware resources and provides portability as the proposed design is not based on gate-level details. Our cell design implementing a linear gap penalty resulted in a performance improvement of 32× over a GPP platform and surpassed the hardware utilization of another implementation by a factor of 4.23.

A Study on Development Dosing System of Gating System for Semi-Solid Diecasting Process by Finite Element Method (유한요소해석을 이용한 반용융 다이캐스팅 공정의 주조방안 설계시스템 개발에 관한 연구)

  • 박철우;박준홍;김영호;최재찬
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2002.10a
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    • pp.324-328
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    • 2002
  • Semi-Solid Diecasters usually carry out the Semi-Solid diecasting experiments before producing new casts. At the Semi-Solid diecasting stages, the runner-gate part has been always repeatedly corrected, which leads to a tedious processing time and increased processing cost. A large amount of experience is essential in manual assessment and if the design is defective, much time and a great deal of efforts will be wasted in the modification of the die. In this study, design system has been developed based on design database. In addition, gate experiment for gating system design has been carried out to append the database. It is possible for engineers to make efficient gating system design of Semi-Solid diecasting and it will result in the reduction of expenses and time to be required. The detailed contents of the research are described in the followings. An attempt is made to link programs incorporating a number of expert design rules with the process variables obtained by commercial FVM softwares, MAGMAsoft, to form a useful package.

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A Research on the Reconstruction Project for the Main Gate Area of the U University Campus (대학 정문 진입부 재구성을 통한 캠퍼스 환경개선에 관한 연구 -경남 소재 U대학의 주차 및 복합시설 구성을 중심으로-)

  • Lee, Kwang-Hee
    • The Journal of Sustainable Design and Educational Environment Research
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    • v.10 no.1
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    • pp.1-9
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    • 2011
  • In order to solve the current shortage of parking spaces, and redesign the main gate area of the U University, the research investigated some cases of other schools located in Seoul which actively constructed multi-purpose building structures. Those schools are considered to be good samples showing their efforts to fulfill the needs of more parking spaces in their campuses, and to cover with the growing needs of multi-functioned facilities accommodating services of academic affairs, reading room spaces, and amenities. With the investigation, the research finded out the current trends of campus developments from the sample schools, such as underground parking facilities connected with multi-purpose buildings along the main arteries of campuses. Following the trends the research thoroughly examined the present conditions of our school and tried to make some possible alternatives for the facilities. Under the conditions, the research suggested 1)to construct underground parking lots accepting around 1,000 cars under the ivory tower square located in front of University Administration Building, 2)to develop a big-scaled open square at the university main gate, and 3)to build a multi-purpose structure along the main street of the campus, which included administration services, studying spaces, and some commercial facilities.

Thermal Performance of a Heat Sink According to Insulated Gate Bipolar Transistor Array and Installation Location (IGBT 배열과 설치 위치에 따른 히트 싱크 방열 성능)

  • Park, Seung-Jae;Yoon, Youngchan;Lee, Tae-Hee;Lee, Kwan-Soo
    • Korean Journal of Air-Conditioning and Refrigeration Engineering
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    • v.30 no.1
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    • pp.1-9
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    • 2018
  • Thermal performance of a heat sink for an inverter power stack was analyzed in terms of array and installation location of an Insulated Gate Bipolar Transistor (IGBT). Thermal flow around the heat sink was calculated with a numerical model that could simulate forced convection. Thermal performance was calculated depending on the array and location of high- and low-power IGBTs considering the maximum temperature of IGBT. The optimum array and installation location were found and causes were analyzed based on results of numerical analysis. For the numerical analysis, experiment design considered the installation location of IGBT, ratio of heat generation rates of high- and low-power IGBTs, and velocity of the inlet air as design variables. Based on numerical results, a correlation that could calculate thermal performance of the heat sink was suggested and the maximum temperature of the IGBT could be predicted depending on the installation method.