• Title/Summary/Keyword: Gate Current

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Construction of BLAST Server for Mollusks (연체동물 전용 서열 블라스트 서버구축)

  • Lee, Yong-Seok;Jo, Yong-Hun;Kim, Dae-Soo;Kim, Dae-Won;Kim, Min-Young;Choi, Sang-Haeng;Yon, Jei-Oh;Byun, In-Sun;Kang, Bo-Ra;Jeong, Kye-Heon;Park, Hong-Seog
    • The Korean Journal of Malacology
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    • v.20 no.2
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    • pp.165-169
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    • 2004
  • The BLAST server for the mollusk was constructed on the basis of the Intel Server Platform SC-5250 dual Xeon 2.8 GHz cpu and Linux operating system. After establishing the operating system, we installed NCBI (National Center for Biotechnology Information) WebBLAST package after web server configuration for cgi (common gate interface) (http://chimp.kribb.re.kr/mollusks). To build up the stand alone blast, we conducted as follows: First, we downloaded the genome information (mitochondria genome information), DNA sequences, amino acid sequences related with mollusk available at NCBI. Second, it was translated into the multifasta format that was stored as database by using the formatdb program provided by NCBI. Finally, the cgi was used for the Stand Alone Blast server. In addition, we have added the vector, Escherichia coli, and repeat sequences into the server to confirm a potential contamination. Finally, primer3 program is also installed for the users to design the primer. The stand alone BLAST gave us several advantages: (1) we can get only the data that agree with the nucleotide sequence directly related with the mollusks when we are searching BLAST; (2) it will be very convenient to confirm contamination when we made the cDNA or genomic library from mollusks; (3) Compared to the current NSBI, we can quickly get the BLAST results on the mollusks sequence information.

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Characteristics of $Ta_{2}O_{5}$ Films by RF Reactive Sputtering (RF 반응성 스펏터링으로 제조한 $Ta_{2}O_{5}$ 막의 특성)

  • Park, Wug-Dong;Keum, Dong-Yeal;Kim, Ki-Wan;Choi, Kyu-Man
    • Journal of Sensor Science and Technology
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    • v.1 no.2
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    • pp.173-181
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    • 1992
  • Tantalum pentoxide($Ta_{2}O_{5}$) thin films on p-type (100) silicon wafer were fabricated by RF reactive sputtering. Physical properties and structure of the specimens were examined by XRD and AES. From the C-V analysis, the dielectric constant of $Ta_{2}O_{5}$ films was in the range of 10-12 in the reactive gas atmosphere in which 10% of oxygen gas is mixed. The ratio of Ta : 0 was 1 : 2 and 1 : 2.49 by AES and RBS examination, respectively. The heat-treatment at $700^{\circ}C$ in $O_{2}$ ambient led to induce crystallization. When the heat-treatment temperature was $1000^{\circ}C$, the dielectric constant was 20.5 in $O_{2}$ ambient and 23 in $N_{2}$ ambient, respectively. The crystal structure of $Ta_{2}O_{5}$ film was pseudo hexagonal of ${\delta}-Ta_{2}O_{5}$. The flat band voltage shift(${\Delta}V_{FB}$) of the specimens and the leakage current density were decreased for higher oxygen mixing ratio. The maximum breakdown field was 2.4MV/cm at the oxygen mixing ratio of 10%. The $Ta_{2}O_{5}$ films will be applicable to hydrogen ion sensitive film and gate oxide material for memory device.

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Characteristics of $Pt/SrBi_2Ta_2O_9/ZrO_2/Si$ structures for NDRO ERAM (NDRO FRAM 소자를 위한 $Pt/SrBi_2Ta_2O_9/ZrO_2/Si$ 구조의 특성에 관한 연구)

  • 김은홍;최훈상;최인훈
    • Journal of the Korean Vacuum Society
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    • v.9 no.4
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    • pp.315-320
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    • 2000
  • We have investigated the crystal structure and electrical properties of Pt/SBT/$ZrO_2$/Si (MFIS) and Pt/SBT/Si (MFS) structures for the gate oxide of ferroelectric memory. XRD spectra and SEM showed that the SBT film of SBT/$ZrO_2$/Si structure had larger grain than that of SBT/Si structure. $ZrO_2$ film between SBT film and Si substrate is confirmed as a good candidate for a diffusion barrier by the analysis of AES. The remanent polarization decreased and coercive voltage increased in Pt/SBT/$ZrO_2$/Pt/$SiO_2$/Si structure. This effect may increase memory window of MFIS structure directly related to the coercive voltage. From the capacitance-volt-age characteristics, the memory windows of Pt/SBT (210 nm)/$ZrO_2$ (28 nm)/Si structure were in the range of 1~l.5 V at the applied voltage of 4~6 V. The current densities of Pt/SBT/ZrO$_2$/Si with as -deposited Pt electrode and annealed at $800^{\circ}C$ in $O_2$ambient were $8\times10^{-8} A/\textrm{cm}^2$ and $4\times10^{-8}A/\textrm{cm}^2$ , respectively.

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A NEW High Efficiency Soft-Switching Three-Phase PWM Rectifier (새로운 고효율 소프트 스위칭 3상 PWM 정류기)

  • Mun Sang-Pil;Suh Ki-Young;Lee Hyun-Woo;Kwon Soon-Kurl
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.42 no.2 s.302
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    • pp.49-58
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    • 2005
  • A new soft switching three-phase PWM rectifier with simple circuit configuration and high efficiency has been developed. The proposed circuit is a kind of the auxiliary resonant commutated Pole(ARCP)converter The conventional ARCP converter requires three-auxiliary reactors and six-auxiliary switches for the soft switching auxiliary circuit and for these switching elements, a gate drive circuit and a control circuit are required, resulting in high part as a disadvantage. In the main circuit proposed in this paper, the auxiliary soft switching circuit is composed of two-auxiliary reactors, two-auxiliary switches and several diodes. In addition, common use of the PWM control circuit for two-switches will make the control circuit of the auxiliary switches simple. By means of function of the soft switching auxiliary circuit, the main switching element performs zero voltage switching operation and the auxiliary switches perform the zero current switching. In this paper, the circuit configuration and the operational analysis of the proposed circuit are described at first and then, experimental results will be reported. By using a prototype with 5[kW] capacity, the conversion efficiency of maximum $98.8[\%]$ and the power factor of $99[\%]$ or higher were obtained.

Low-Power $32bit\times32bit$ Multiplier Design for Deep Submicron Technologies beyond 130nm (130nm 이하의 초미세 공정을 위한 저전력 32비트$\times$32비트 곱셈기 설계)

  • Jang Yong-Ju;Lee Seong-Soo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.6 s.348
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    • pp.47-52
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    • 2006
  • This paper proposes a novel low-power $32bit\times32bit$ multiplier for deep submicron technologies beyond 130nm. As technology becomes small, static power due to leakage current significantly increases, and it becomes comparable to dynamic power. Recently, shutdown method based on MTCMOS is widely used to reduce both dynamic and static power. However, it suffers from severe power line noise when restoring whole large-size functional block. Therefore, the proposed multiplier mitigates this noise by shutting down and waking up sequentially along with pipeline stage. Fabricated chip measurement results in $0.35{\mu}m$ technology and gate-transition-level simulation results in 130nm and 90nm technologies show that it consumes $66{\mu}W,\;13{\mu}W,\;and\;6{\mu}W$ in idle mode, respectively, and it reduces power consumption to $0.04%\sim0.08%$ of active mode. As technology becomes small, power reduction efficiency degrades in the conventional clock gating scheme, but the proposed multiplier does not.

A Novel Design of a Low Power Full Adder (새로운 저전력 전가산기 회로 설계)

  • Kang, Sung-Tae;Park, Seong-Hee;Cho, Kyoung-Rok;You, Young-Gap
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.38 no.3
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    • pp.40-46
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    • 2001
  • In this paper, a novel low power full adder circuit comprising only 10 transistors is proposed. The circuit is based on the six -transistor CMOS XOR circuit, which generates both XOR and XNOR signals and pass transistors. This adder circuit provides a good low power characteristics due to the smaller number of transistors and the elimination of short circuit current paths. Layouts have been carried out using a 0.65 ${\mu}m$ ASIC design rule for evaluation purposes. The physical design has been evaluated using HSPICE at 25MHz to 50MHz. The proposed circuit has been used to build 2bit and 8bit ripple carry adders, which are used for evaluation of power consumption, time delay and rise and fall time. The proposed circuit shows substantially improved power consumption characteristics, about 70% lower than transmission gate full adder (TFA), and 60% lower than a design using 14 transistors (TR14). Delay and signal rise and fall time are also far shorter than other conventional designs such as TFA and TR14.

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The surface kinetic properties between $BCl_3/Cl_2$/Ar plasma and $Al_2O_3$ thin film

  • Yang, Xue;Kim, Dong-Pyo;Um, Doo-Seung;Kim, Chang-Il
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.169-169
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    • 2008
  • To keep pace with scaling trends of CMOS technologies, high-k metal oxides are to be introduced. Due to their high permittivity, high-k materials can achieve the required capacitance with stacks of higher physical thickness to reduce the leakage current through the scaled gate oxide, which make it become much more promising materials to instead of $SiO_2$. As further studying on high-k, an understanding of the relation between the etch characteristics of high-k dielectric materials and plasma properties is required for the low damaged removal process to match standard processing procedure. There are some reports on the dry etching of different high-k materials in ICP and ECR plasma with various plasma parameters, such as different gas combinations ($Cl_2$, $Cl_2/BCl_3$, $Cl_2$/Ar, $SF_6$/Ar, and $CH_4/H_2$/Ar etc). Understanding of the complex behavior of particles at surfaces requires detailed knowledge of both macroscopic and microscopic processes that take place; also certain processes depend critically on temperature and gas pressure. The choice of $BCl_3$ as the chemically active gas results from the fact that it is widely used for the etching o the materials covered by the native oxides due to the effective extraction of oxygen in the form of $BCl_xO_y$ compounds. In this study, the surface reactions and the etch rate of $Al_2O_3$ films in $BCl_3/Cl_2$/Ar plasma were investigated in an inductively coupled plasma(ICP) reactor in terms of the gas mixing ratio, RF power, DC bias and chamber pressure. The variations of relative volume densities for the particles were measured with optical emission spectroscopy (OES). The surface imagination was measured by AFM and SEM. The chemical states of film was investigated using X-ray photoelectron spectroscopy (XPS), which confirmed the existence of nonvolatile etch byproducts.

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A 12b 130MS/s 108mW $1.8mm^2$ 0.18um CMOS ADC for High-Quality Video Systems (고화질 영상 시스템 응용을 위한 12비트 130MS/s 108mW $1.8mm^2$ 0.18um CMOS A/D 변환기)

  • Han, Jae-Yeol;Kim, Young-Ju;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.3
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    • pp.77-85
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    • 2008
  • This work proposes a 12b 130MS/s 108mW $1.8mm^2$ 0.18um CMOS ADC for high-quality video systems such as TFT-LCD displays and digital TVs requiring simultaneously high resolution, low power, and small size at high speed. The proposed ADC optimizes power consumption and chip area at the target resolution and sampling rate based on a three-step pipeline architecture. The input SHA with gate-bootstrapped sampling switches and a properly controlled trans-conductance ratio of two amplifier stages achieves a high gain and phase margin for 12b input accuracy at the Nyquist frequency. A signal-insensitive 3D-fully symmetric layout reduces a capacitor and device mismatch of two MDACs. The proposed supply- and temperature- insensitive current and voltage references are implemented on chip with a small number of transistors. The prototype ADC in a 0.18um 1P6M CMOS technology demonstrates a measured DNL and INL within 0.69LSB and 2.12LSB, respectively. The ADC shows a maximum SNDR of 53dB and 51dB and a maximum SFDR of 68dB and 66dB at 120MS/s and 130MS/s, respectively. The ADC with an active die area of $1.8mm^2$ consumes 108mW at 130MS/s and 1.8V.

Narrow channel effect on the electrical characteristics of AlGaN/GaN HEMT (AlGaN/GaN HEMT의 채널폭 스케일링에 따른 협폭효과)

  • Lim, Jin Hong;Kim, Jeong Jin;Shim, Kyu Hwan;Yang, Jeon Wook
    • Journal of IKEEE
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    • v.17 no.1
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    • pp.71-76
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    • 2013
  • AlGaN/GaN HEMTs (High electron mobility transistors) with narrow channel were fabricated and the effect of channel scaling on the device were investigated. The devices were fabricated using e-beam lithography to have same channel length of $1{\mu}m$ and various channel width from 0.5 to $9{\mu}m$. The sheet resistance of the channel was increased corresponding to the decrease of channel width and the increase was larger at the width of sub-${\mu}m$. The threshold voltage of the HEMT with $1.6{\mu}m$ and $9{\mu}m$ channel width was -2.85 V. The transistor showed a variation of 50 mV at the width of $0.9{\mu}m$ and the variation 350 mV at $0.5{\mu}m$. The transconductance of 250 mS/mm was decreased to 150 mS/mm corresponding to the decrease of channel width. Also, the gate leakage current of the HEMT decreased with channel width. But the degree of was reduced at the width of sub-${\mu}m$. It was thought that the variation of the electrical characteristics of the HEMT corresponding to the channel width came from the reduced Piezoelectric field of the AlGaN/GaN structure by the strain relief.

Development of a Pump Operation Rule in a Drainage Pump Station using a Real Time Control Model for Urban Drainage System (내배수시스템 실시간 운영 모형을 이용한 배수펌프장 운영기법 개발)

  • Lee, Jung-Ho;Lee, Yang-Jae;Kim, Joong-Hoon;Jun, Hwan-Don
    • Journal of Korea Water Resources Association
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    • v.40 no.11
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    • pp.877-886
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    • 2007
  • An urban drainage system consists of two major systems : flood drainage facilities and operating practices. The facilities are composed of sewer networks, gates, and pumping stations and the operating practice consists of pump or gate operation. Then, a real time simulation system which is able to simulate urban runoff and the pump operation and to consider the backwater effect is required to operate efficiently the pump. With this system, the efficient pump operating rule can be developed to diminish the possible flood damage on urban areas. In this study, a real time simulation system was developed using the SWMM 5.0 DLL and Visual Basic 6.0 equipped with EXCEL. Also, for developing efficient pump operating Rules, two new Rules were suggested. The first Rule is designed to operate pumps considering the condition of sewer networks such as depths of each junction. The second is to discharge all the amount of inflow at each time step. Results obtained by those Rules were compared with one by the current pump operating Rule which is able to consider only the depth of the retard basin. The developed model was applied to Joonggok retard basin and verified their applicability.