• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.1
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• pp.24-38
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• 2009

In this paper, we implement processor debugger based on OCD(On-Chip Debugger). Implemented debugger consist of software debugger that supports a functionality of symbolic debugging, OCD integrated into target processor as a function of debugging, and Interface & Control block which interfaces software debugger and OCD at high speed rates. The debugger supports c/assembly level debugging using software debugger as OCD is integrated into target processor. After OCD block is interfaced with 32bit RISC processor core and then implemented with FPGA, the verification of On-Chip Debugging System is carried out through connecting OCD and Interface & Control block, and SW debugger.

• The KIPS Transactions:PartA
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• v.17A no.3
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• pp.153-158
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• 2010

Most of software developers use the GNU Debugger (GDB) in order to debug code execution. The GDB supports a remote debugging environment through serial communication. However, in embedded systems, the speed is limited in the serial communication. Due to this reason, the serial communication is rarely used for the debugging purpose. To solve this problem, many embedded systems adapt the JTAG and the USB interface. This paper proposes debugging environment via USB-JTAG interface to debug the EISC processor, and introduces how the USB interface works on the GDB and how the JTAG module handles debugging packets.

• Proceedings of the Korean Information Science Society Conference
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• 1999.10c
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• pp.596-598
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• 1999

교환기 소프트웨어 개발에 많은 언어가 사용되고 있으나, 현재 우리나라의 교환기 제조업체 대부분은 ITU-T에서 통신 소프트웨어 개발 언어로 권고하는 CHILL 언어를 사용하고 있다. CHILL은 엄격한 타입 검사, 구조적 프로그래밍, 모듈화, 병렬 처리 기능을 특징으로 하고 있다. LG정보통신에서는 이러한 CHILL 프로그램의 시험 및 디버깅을 위하여 GNU Debugger(GDB)를 기반으로 CHILL 교차 디버거인 LGDB(LG Debugger)를 개발하였다. LGDB는 현재 사용 중인 대부분의 마이크로 프로세서를 지원하며, 호스트에서 개발한 프로그램들이 교환기 시스템과 같은 목적 시스템 상에서 정상적으로 실행되는지 검사하고, 만약 오류가 발생하였을 경우 이를 추적하여 수정하는 기능을 제공한다. 점차 대용량화, 고성능화가 요구되고 있는 교환기 개발 프로젝트의 추세를 감안할 때, LGDB는 교환기 소프트웨어의 품질 및 생산성 향상에 매우 높은 기여를 할 것이다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.1
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• pp.76-84
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• 2009

This paper proposes a SOC platform which is eligible for education and application SOC design. The platform, fully synthesizable and reconfigurable, includes the OpenRISC embedded processor, some basic peripherals such as GPIO, UART, debug interlace, VGA controller and WISHBONE interconnect. The platform uses a set of development environment such as compiler, assembler, debugger and RTOS that is built for HW/SW system debugging and software development. Designed SOC, IPs and Testbenches are described in the Verilog HDL and verified using commercial logic simulator, GNU SW development tool kits and the FPGA. Finally, a multimedia SOC derived from the SOC platform is implemented to ASIC using the Magnachip cell library based on 0.18um 1-poly 6-metal technology.