• KIPS Transactions on Software and Data Engineering
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• v.10 no.4
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• pp.115-124
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• 2021

Since function block diagram (FBD) programs are widely used to implement safety-critical systems, effective testing for FBD programs has become important. Mutation testing, a fault-based testing, is highly effective in fault detection but computationally expensive. To support testers for FBD programs, we propose an automated mutant generator for FBD programs. We designed the MuGenFBD tool with the cost and equivalent mutant issues in consideration. We conducted experiments on real industrial examples to present the performance of MuGenFBD. The results show that MuGenFBD can generate mutants for FBD programs automatically with low probability of equivalent mutants and low cost. This tool can effectively support mutation analysis and mutation-adequate test generation for FBD programs.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.4
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• pp.265-269
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• 2009

Formal specification plays important roles in guaranteeing software safety of safety-critical systems such as nuclear power plant's digital control systems. We had developed a technique [1] which synthesizes Function Block Diagram(FBD) programs from NuSCR formal requirements specifications, but it did not be used widely as it had no automatic tool support. FBD is one of the programming languages for Programmable Logic Controllers(PLC) based system. This paper introduces a CASE tool, NuSCRtoFBD, developed to automate the synthesis procedure. The CASE tool NuSCRtoFBD can reduce a number of errors occurred in the process of manual FBD programming.

• Journal of KIISE:Software and Applications
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• v.35 no.3
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• pp.149-161
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• 2008

As Programmable Logic Controllers(PLCs) are frequently used to implement real-time safety critical software, testing of PLC software is getting more important. We propose a structural testing technique on Function Block Diagram(FBD) which is one of the PLC programming languages. In order to test FBD networks, we define templates for function blocks including timer function blocks and propose an algorithm based on the templates to transform a unit FBD into a flowgraph. We generate test cases by applying existing testing techniques to the generated flowgraph. While the existing FBD testing technique do not consider infernal structure of FBD to generate test cases and can be applied only to FBD from which the specific intermediate model can be generated, this approach has advantages of systematic test case generation considering infernal structure of FBD and applicability to any FBD without regard to its intermediate format. Especially, the proposed method enables FBD networks including timer function blocks to be tested thoroughly. To demonstrate the effectiveness of the proposed method, we use trip logic of bistable processor of digital nuclear power plant protection systems which is being developed in Korea.

• Nuclear Engineering and Technology
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• v.41 no.1
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• pp.79-90
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• 2009

Verification of programmable logic controller (PLC) programs written in IEC 61131-3 function block diagram (FBD) is essential in the transition from the use of traditional relay-based analog systems to PLC-based digital systems. This paper describes effective use of the well-known verification tool VIS for automatic verification of behavioral equivalences between successive FBD revisions. We formally defined FBD semantics as a state-transition system, developed semantic-preserving translation rules from FBD to Verilog programs, implemented a software tool to support the process, and conducted a case study on a subset of FBDs for APR-1400 reactor protection system design.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.3
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• pp.211-215
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• 2009

As Programmable Logic Controllers (PLCs) are increasingly used to implement safety critical systems such as nuclear instrumentation & control system, formal verification for PLC based programs is becoming essential. This paper proposes a formal verification technique for PLC program implemented with function block diagram (FBD). In order to verify an FBD program, we translate an FBD program into a Verilog model and perform model checking using SMV model checker We developed a tool, FBD Verifier, which translates FBD programs into Verilog models automatically and supports efficient and intuitive visual analysis of a counterexample. With the proposed approach and the tool, we verified large FBD programs implementing reactor protection system of Korea Nuclear Instrumentation and Control System R&D Center (KNICS) successfully.

• KIISE Transactions on Computing Practices
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• v.22 no.3
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• pp.145-150
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• 2016

Finding the exact location of faults in a program requires enormous time and effort. Several fault localization methods based on control flows of a program have been studied for decades. Unfortunately, these methods are not applicable to programs based on data-flow languages. A recently proposed mutation-based fault localization method is applicable to data-flow languages, as well as control-flow languages. However, there are no studies on the effectiveness of the mutation-based fault localization method for data-flow based programs. In this paper, we provided an experimental case study to evaluate the effectiveness of mutation-based fault localization on programs implemented in Function Block Diagram (FBD), a widely used data-flow based language in safety-critical systems implementation. We analyzed several real faults in the implementation of FBD programs of a nuclear reactor protection system, and evaluated the mutation-based fault localization effectiveness for each fault.

• Proceedings of the Korean Information Science Society Conference
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• 2012.06b
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• pp.184-186
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• 2012

Function Block Diagram (FBD)는 산업용 컴퓨터인 Programmable Logic Controller (PLC)의 표준 프로그래밍 언어 중 하나이다. 다양한 시험 기법들의 오류 검출 효과성을 평가하기 위해 뮤테이션 분석 기법이 널리 쓰이고 있는데, FBD 모델 대상 뮤테이션 분석 기법에 대한 연구는 이루어지지 못하였다. 본 연구에서는 FBD 모델 대상 뮤테이션 분석 기법의 토대가 되는 FBD 모델 뮤테이션 연산자를 제안한다. 이를 위해서 FBD 모델의 특성, 다양한 FBD 모델링 오류, 기존의 뮤테이션 분석 기법에 관한 연구를 포괄적으로 분석하여 FBD 모델에 적합한 뮤테이션 연산자를 정의한다. 실제 산업계에서 쓰이는 FBD 모델을 대상으로 뮤테이션 연산자를 적용하고 평가한다.

• Journal of KIISE
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• v.43 no.5
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• pp.569-578
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• 2016

The PLC (Programmable Logic Controller) has been widely used for the development of digital control system of nuclear power plant. The PLC has high maintenance costs and increasing complexity, hence, FPGA (Field Programmable Gate Array) based digital control system has been considered as an alternative. However, the development of FPGA based digital control system is a challenge for PLC engineers because they are required to learn about new language to develop FPGA and knowledge and know-how acquired in the development of PLC is not transferable. In this study, we proposed and implemented an automatic translation tool for translation of FBD (Function Block Diagram), a programming language of PLC software, into VHDL (VHSIC Hardware Description Language). Automatically translating the FBD to VHDL using this tool allows PLC engineers to develop FPGA without any knowledge of the hardware description language.

• Proceedings of the Korea Information Processing Society Conference
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• 2002.04b
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• pp.1013-1016
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• 2002

제어 시스템에 사용되는 흐름 제어 언어로는 IL(Instruction List), ST(Structured Text), FBD(Function Block Diagram), SFC(Sequential Function Chart), LD (Ladder Diagram)가 있다. 일반적으로 제어 시스템에 탑재하여 사용하는 언어는 상기 언어 중 두 종류 이하의 특정 언어로 제한되어 있다. 이러한 제약을 보완하기 위해, 모든 흐름 제어 언어를 통합 분석할 수 있는 통합 분석기가 필요하다. 본 논문에서는 흐름 제어 언어의 통합 분석 처리가 가능하도록 그래픽 표현의 FBD 를 문자 표현의 EST(Extended Structured Text)로 변형하는 규칙과 문자 표현의 EST 를 IL 로 변형하는 규칙을 제시한다. 언어간의 변형 과정에서 FBD 를 ST 로 표현할 수 없는 부분을 EST 로 정의한다. 또한 본 논문에서 제안된 EST 를 기반으로 통합 분석기의 구조를 제시한다.

• The KIPS Transactions:PartD
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• v.11D no.2
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• pp.415-422
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• 2004

Automation systems improve the productivity of works which relate to product design, facilities management, fault processing and quality evaluation. In these systems, the description language for monitoring and control process is called new control language. These are five flow control languages : IL, ST, FBD, SFC and LD. IL and ST are based on left form. FBD, SFC and LD are based on graphic form. Generally, a software which monitors and controls a system is allowed to use just one flow control language. It is impossible to use more than two languages for simulation in the same system environment. In this paper, we analyzed the characteristics of flow control languages and the process of programming in the legacy system. In addition, for the Integrated processing of languages, we propose Extended ST based on the high-level ST language. Based on this research, we implement a graphical language editor and EST-IL convertor. The graphical language editor makes sequence rules, and converts graphical language into EST. EST-IL convertor has a function to convert EST into IL which is similar to assembly language. As the result of this paper, we present a scheme which integrates all the flow control language processing based on IL.